Michael (XIAO Xufeng)
6a8aed12ee
ci: partially enable ut tests for esp32c2
...
Disabled test cases are tracked in:
IDF-4465, IDF-5045, IDF-5057, IDF-5058, IDF-5059, IDF-5060, IDF-5061, IDF-5131
- test_fatfs: IDF-5136
- test_pm: IDF-5053
- test_cache_mmu: IDF-5138
- test_partitions: IDF-5137
- test_vfs: IDF-5139
- test_freertos: IDF-5140
- test_wpa_supplicant: IDF-5046
- test_mbedtls: IDF-5141
- test_pthread: IDF-5142
- test_protocomm: IDF-5143
- test_lightsleep: IDF-5053
- test_taskwdt: IDF-5055
- test_tcp_transport: IDF-5144
- test_app_update: IDF-5145
- test_timer: IDF-5052
- test_spi: IDF-5146
- test_rtc_clk: IDF-5060
- test_heap: IDF-5167
ci: fixed issues for tests of libgcc, ets_timer, newlib
test_pm: support on C2
2022-06-02 14:23:35 +08:00
Laukik Hase
3925365351
ci: Fix pre-check
stage failing tests
...
- Updated license headers
- Re-enabled public headers and static analysis checks
- Fix public header file check failure
Co-authored-by: Aditya Patwardhan <aditya.patwardhan@espressif.com>
2022-03-03 01:37:10 +05:30
Aditya Patwardhan
60b167f2d6
mbedtls-3.1 update: Removed the MBEDTLS_PRIVATE
from multiple files
...
after they have been again made public in mbedtls-3.1
*Added `MBEDTLS_ALLOW_PRIVATE_ACCESS` in some files.
2022-03-03 01:37:10 +05:30
Aditya Patwardhan
45122533e0
mbedtls-3 update:
...
1) Fix build issue in mbedtls
2) skip the public headers check in IDF
3)Update Kconfig Macros
4)Remove deprecated config options
5) Update the sha API according to new nomenclature
6) Update mbedtls_rsa_init usage
7) Include mbedtls/build_info.h instead of mbedtls/config.h
8) Dont include check_config.h
9) Add additional error message in esp_blufi_api.h
2022-03-03 01:37:10 +05:30
Tomas Rezucha
ebaca79557
other: Move cbor, jsmn and libsodium to idf-component-manager
...
Marginal components are being carved out from esp-idf and moved to
https://github.com/espressif/idf-extra-components .
They are distributed via idf-component-manager, see
https://components.espressif.com .
2021-11-30 21:44:48 +01:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
...
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
...
Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
...
Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Marius Vikhammer
32fd9d6c63
s2 crypto: update perf test to use cache comp timer
...
Updated S2 hardware accelerated crypto to use the cache compensated timer.
Re-enabled RSA performance test and set lower targets now that results are more stable
Closes: IDF-1174
2020-03-23 11:30:55 +08:00
Marius Vikhammer
37369a8a57
crypto: SHA and AES accelerator bring up for S2
...
Brings up, fixes and enables AES and SHA hardware acceleration.
Closes IDF-714
Closes IDF-716
2020-03-11 15:09:45 +08:00
Marius Vikhammer
c63684cf6c
hw crypto: activated hardware acceleration for esp32s2beta
...
Activated AES, RSA and SHA hardware acceleration for esp32s2 and enabled related unit tests.
Updated with changes made for ESP32 from 0a04034
, 961f59f
and caea288
.
Added performance targets for esp32s2beta
Closes IDF-757
2019-12-12 12:37:29 +08:00
Ivan Grokhotkov
589a1f216f
mbedtls: add SHA performance test
...
Results with this revision:
SHA256 rate 2.599MB/sec Debug 240MHz SW
SHA256 rate 1.147MB/sec Release 80MHz SW
SHA256 rate 3.469MB/sec Release 240MHz SW
SHA256 rate 2.687MB/sec Release 240MHz SW + PSRAM workaround
SHA256 rate 9.433MB/sec Debug 240MHz HW rev1
SHA256 rate 3.727MB/sec Release 80MHz HW rev1
SHA256 rate 10.961MB/sec Release 240MHz HW rev1
SHA256 rate 9.966MB/sec Release 240MHz HW rev1 + PRAM workaround
SHA256 rate 10.974MB/sec Debug 240MHz HW rev3
SHA256 rate 4.362MB/sec Release 80MHz HW rev3
SHA256 rate 13.207MB/sec Release 240MHz HW rev3
Debug = Og, assertions enabled
Release = O2, assertions disabled
2019-11-04 10:48:08 +01:00