Commit Graph

190 Commits

Author SHA1 Message Date
Guillaume Souchere
7ce0620d32 heap: Update host tests after incorporation of the new TLSF implementation 2023-02-16 08:48:00 +00:00
Guillaume Souchere
48b0000e22 heap: update the calculation of fl index max and use bitfield in control_t
The calculation of fl index max is changed to always be the smallest
number that includes the size of the registered memory.

The control_construct() function now checks for minimum size as the control structure
parameters are calculated.

There is no longer a minimum configuration for fl index max so the tlsf_config
enum is striped down to remove unecessary compile time values.

the tlsf_size() function will fail if no tlsf pointer is passed as parameter since there
is no way to calculate a default tlsf size anymore.

bitfields are now used in control_t when possible which reduces the size of the structure
from 56 bytes to 36 bytes.
2023-02-16 08:48:00 +00:00
Guillaume Souchere
9f6b549dea Revert "tlsf control's structure should remain opaque"
This reverts commit 7010314c4a.
2023-02-16 08:48:00 +00:00
Philippe
6a3f3e9421 add host test with multiple heap size 2023-02-16 08:48:00 +00:00
Philippe
30bd908f97 clarify parameter usage in tslf_create 2023-02-16 08:48:00 +00:00
Philippe
a7b9e7a8bd tlsf control's structure should remain opaque 2023-02-16 08:48:00 +00:00
Philippe
e45d350b97 dynamic control block per heap 2023-02-16 08:48:00 +00:00
Chip Weinberger
8792b1de1e SPIRAM: 'Abort on allocation failure' should not trigger when there is available SPI ram
(cherry picked from commit 8dcdb2f363fd3fa00bd77e4bd75e7c73d6c7d0fb)
2022-08-22 02:45:10 +00:00
jingli
b01797b87d fix param passed to assert_valid_block, should be block not ptr 2022-06-23 21:45:26 +08:00
Omar Chebib
2cc879120b Heap: fix typos in test and component 2022-04-13 14:23:51 +08:00
Omar Chebib
d7f614d58a Heap: fix free bytes calculation for TLSF heap
* Closes https://github.com/espressif/esp-idf/issues/8270
2022-04-06 10:23:11 +08:00
Omar Chebib
d300a9cfe3 Heap: Fix a possible bug in the TLSF allocator (backport v4.3) 2022-01-06 11:36:46 +00:00
gaoxiaojie
61d300f055 heap: fix multi_heap_get_info_impl 2021-11-25 10:22:41 +08:00
Mahavir Jain
dd73ba9601 heap: use hal specific API to get cpu cycles count
This fixes compilation issue of heap tracing feature for RISC-V
architecture.
2021-06-21 14:40:07 +05:30
Omar Chebib
c4dc3acba9 heap: add light poisoning configuration to the tests.
Relates to IDF-2653
2021-02-01 11:58:42 +08:00
Omar Chebib
d902b4e7db heap: fix unaligned memory bug when poisoning is enabled.
Poisoned memory is now aligned as requested by the user.
Closes IDF-2653
2021-02-01 11:58:42 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
jiangguangming
47f469b238 heap: support aligned_alloc for retention memory on ESP32-C3 2021-01-13 14:41:22 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Marius Vikhammer
9c8e4fd4c5 C3: build and run unit tests
Enable building and running of unit tests in CI for C3 as well as fix
related compile errors

Also enables building of C3 test apps
2021-01-11 11:34:37 +08:00
Felipe Neves
89d461df2a heap: increase the sl to reduce the fragmentation to acceptable level. 2020-12-17 12:52:56 -03:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Angus Gratton
935e4b4d62 Merge branch 'feature/riscv_arch' into 'master'
Add RISC-V support

Closes IDF-2359

See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Felipe Neves
35ef4ffa99 heap: add tlsf config specific to the host test 2020-11-12 11:07:46 +11:00
Felipe Neves
60f79705a3 heap: tune the tlsf control structure to reduce per-pool overhead 2020-11-12 11:06:29 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Michael (XIAO Xufeng)
1966f00f0b soc: updates caps usage
We should define caps as 1 if true. When use the caps macros, #if and
 #if ! should be used instead of #ifdef/#ifndef.
2020-10-17 16:10:17 +08:00
Angus Gratton
bf85348034 tlsf: Enable asserts 2020-10-14 16:11:49 +11:00
Felipe Neves
3057b76a7e tests: re-add all disabled tests and all disabled configurations 2020-10-14 16:11:49 +11:00
Felipe Neves
f3783ba258 app_trace/sysview: fixed freertos tracing calling plus sync apptrace component with the master branch version
docs: remove reference to backported features in freertos 10 api-reference.
2020-10-13 23:52:03 +00:00
Felipe Neves
bd9b921713 heap_tlsf: added implementation of TLSF allocator
heap: ported tlsf allocator into multi heap

heap_host_tests: added tlsf allocator into host test

heap_host_test: update freebytes after using free

heap_tests: tlsf now passing on host tests without poisoning

multi_heap: added support for memalign using tlsf implementation

heap_caps: removed heap_caps_aligned_free

heap/test: fixed broken aligned alloc test build

heap: added poisoning pattern when blocks are being merged

heap/tests: added timing tests for memory allocation

heap: reduced tlsf structure overhead

heap/tlsf: made all short functions inside of tlsf  module as inline to improve timings

heap: moved tlsf heap routines outside of flash memory

newlib: linked multiheap memalign with newlib memalign function

heap: moved block member functions to a separate file so multi_heap can use the functions

heap/test: improved the tlsf timing test

heap/test: added memalign on aligned alloc tests

heap: moved tlsf configuration constants to a separated file

heap: added random allocations test with timings

heap: modified the calculation of heap free bytes

heap: make aligned free true deprecated functions and update their documentation

heap: add extra assert after successive mallocs on small allocation host test

heap: remove legacy aligned alloc implementation.

performance: added malloc and free time performance default values
2020-10-13 23:52:03 +00:00
Jakob Hasse
20c068ef3b cmock: added cmock as component
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Felipe Neves
6f5e43e26a heap: added alloc failed hook and configuration options
heap/test: added alloc failed hook tests

docs: added alloc failed hook documentation

heap: add function to register allocation failed hook

docs: allocation failed hook docs improvements
2020-05-04 10:58:38 -03:00
Angus Gratton
9300615a13 Merge branch 'bugfix/heap_psram_fill' into 'master'
heap: Only fill new heaps with FREE_FILL_PATTERN if Comprehensive poisoning is on

See merge request espressif/esp-idf!8210
2020-04-27 14:20:41 +08:00
Martin Vychodil
7491ea677a esp32s2: IRAM/DRAM memory protection
* new mem_prot API
* mem_prot on & locked by default (see Kconfig)
* feature activated in start_cpu0_default()

JIRA IDF-1355
2020-04-21 15:10:58 +02:00
Angus Gratton
100578a9e9 heap: Only fill new heaps with FREE_FILL_PATTERN if Comprehensive poisoning is on
Significantly speeds up heap initialization at startup when default "Light" heap
poisoning is enabled.

Tip via reddit user LinkeSeitentasche https://www.reddit.com/r/esp32/comments/fnj51a/a_guide_to_improving_esp32_boot_speed/
2020-04-15 07:16:08 +00:00
Ivan Grokhotkov
e94288da31 global: use '/usr/bin/env bash' instead of '/usr/bin/bash' in shebangs
Using the method from @cemeyer
(https://github.com/espressif/esp-idf/pull/3166):

find . -name \*.sh -exec sed -i "" -e 's|^#!.*bin/bash|#!/usr/bin/env bash|' {} +

Closes https://github.com/espressif/esp-idf/pull/3166.
2020-04-03 01:10:02 +02:00
Angus Gratton
dd8d1deacb Merge branch 'bugfix/malloc_zero_return_null' into 'master'
bugfix/multi_heap: fix malloc(0) returning valid pointer in some poisoning configurations

Closes IDF-1482

See merge request espressif/esp-idf!8012
2020-03-26 16:19:39 +08:00
Renz Bagaporo
3d0967a58a test: declare requirements and include dirs private 2020-03-23 10:58:50 +08:00
Felipe Neves
481379f14d multi_heap: ensure that malloc(0) return NULL pointer in any poisoning configuration 2020-03-20 14:33:49 +00:00
Felipe Neves
d495f175d5 heap: pushed down all the aligned_alloc / free implementation 2020-03-05 11:02:19 -03:00
Felipe Neves
98e561b79a heap: added aligned alloc implementation on multi_heap layer 2020-02-28 13:17:34 -03:00
Mahavir Jain
5f897fd33c Merge branch 'feat/secure_boot_v2_v41' into 'master'
feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3

Closes IDF-799

See merge request espressif/esp-idf!6778
2020-02-27 18:54:08 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
6a307ee70f heap: removed ptr check in diram area since aligned allocator does not support data allocated from IRAM 2020-01-10 10:15:32 -03:00