Commit Graph

179 Commits

Author SHA1 Message Date
Marius Vikhammer
7b5bdcf077 ulp-riscv: always force COCPU clock on S3
The coprocessor cpu trap signal doesnt have a stable reset value,
force ULP-RISC-V clock on to stop RTC_COCPU_TRAP_TRIG_EN from waking the CPU
2022-10-18 03:06:05 +00:00
Sudeep Mohanty
93153bdfe1 ulp: add all 'ignore' tests to pytest framework
This commit adds a way to run all 'ignore' tests for ulp using the
pytest framework.
2022-10-06 12:58:11 +02:00
Alexey Lapshin
e6f7b1a3a0 tools: cmake: check tool supported version with idf_tools.py 2022-10-03 19:01:32 +04:00
Marius Vikhammer
cb48a7b9f9 Merge branch 'feature/ulp_fsm_adc_s3' into 'master'
ulp-fsm: Update ulp-fsm ADC example with S3 support

Closes IDFGH-6299

See merge request espressif/esp-idf!19924
2022-09-19 14:08:33 +08:00
Alexey Lapshin
a9bd454529 tools: update esp32ulp-elf to v2.35_20220830
Closes https://github.com/espressif/esp-idf/issues/6432
Closes https://github.com/espressif/binutils-esp32ulp/issues/23
2022-09-13 12:55:48 +04:00
Marius Vikhammer
77ba84eeb7 ulp-fsm: Update ulp-fsm ADC example with S3 support
Closes https://github.com/espressif/esp-idf/issues/7963
2022-09-07 16:48:06 +08:00
wuzhenghui
c5d8e94898 freertos, ulp: Fix header inclusion to be compatible with new esp32c6 target 2022-09-06 09:13:20 +00:00
Sudeep Mohanty
4fde033a5f ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3
This commit adds support for using the RTC I2C peripheral on the ULP
RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the
usage of the RTC I2C peripheral.

This commit also modifies the rtc_i2c register structure files to enable
the use of bitfields in the ULP RISC-V RTC I2C driver.
2022-09-05 10:21:43 +02:00
Song Ruo Jing
06b517efcb ci: Modify build-test-rules.yml enable' to disable` to exclude preview targets 2022-09-01 12:38:00 +08:00
Ivan Grokhotkov
9aecfe2b9d
ulp: fix typo in peripherals ld file names 2022-08-30 02:34:28 +02:00
Ivan Grokhotkov
2916bf9b6c
ulp: esp32ulp_mapgen: remove the special case for RISC-V, cleanup
There are multiple changes in this commit:

1. Unify the RISC-V and ULP-FSM code paths in esp32ulp_mapgen.py.
   It seems that these were originally introduced because `nm` output
   for the RISC-V case contained symbol sizes, while for the ULP-FSM
   no symbol sizes were reported. This makes sense, because the
   ULP-FSM object files are produced from assembly source, symbol
   sizes have to be added manually using the .size directive.
   In the case of RISC-V, the object files are built from C sources
   and the sizes are automatically added by the compiler.

   Now 'posix' output format is used for both RISC-V and ULP-FSM.

2. Move BASE_ADDR out of esp32ulp_mapgen.py. This now has to be passed
   from CMake, which should make it easier to modify if a new chip
   with a different RTC RAM base address is added.

3. Add C++ guards to the generated header file.

4. Switch from optparse to argparse for similarity with other IDF
   tools.

5. Add type annotations.
2022-08-30 02:34:28 +02:00
Ivan Grokhotkov
4b03e233d0
ulp: cmake: simplify the dependency on the generated LD script
* "dummy loop to force pre-processed linker file generation" seems to
  be unnecessary. It looks like the idea was copied from the
  dependency of ULP-FSM preprocessed source files on the LD script.
* Can use add_dependencies instead of
  set_target_properties(...LINK_DEPENDS...) which is more readable
* Use target_link_options instead of target_link_libraries, which is
  supported starting from CMake 3.13. Unlike target_link_libraries,
  it doesn't require manually quoting the pats.
2022-08-30 02:34:28 +02:00
Ivan Grokhotkov
67bd7a300a
ulp: cmake: add the target early, use target_* commands everywhere
Instead of collecting options in various variables, use CMake
commands like target_sources and target_link_options.
2022-08-30 02:34:28 +02:00
Ivan Grokhotkov
1a73374f82
ulp: move the expected ULP-FSM toolchain version from .mk to CMake
toolchain_ulp_version.mk is a remnant of the time when we had two
build systems, and CMake had to read the expected version from a
makefile.
2022-08-30 02:34:28 +02:00
Marius Vikhammer
ffed60cc93 ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
Marius Vikhammer
75cdc683ff ulp: fix -Wformat errors in ULP tests 2022-08-04 12:19:28 +08:00
Marius Vikhammer
bc08de5f46 Merge branch 'feature/ulp_test_app' into 'master'
ulp: migrate tests to pytest embedded

Closes IDF-5605

See merge request espressif/esp-idf!19342
2022-08-04 09:12:56 +08:00
Ivan Grokhotkov
401c10ecfb build system: re-add -Wno-format as private flag for some components 2022-08-03 16:42:47 +04:00
Marius Vikhammer
035924a8f1 ulp: migrate tests to pytest embedded 2022-08-03 09:36:17 +08:00
Marius Vikhammer
5d23a757d6 Merge branch 'feature/ulp_uart' into 'master'
ulp-riscv: uart print

See merge request espressif/esp-idf!19229
2022-08-02 09:14:48 +08:00
Jiang Jiang Jian
b885499c74 Merge branch 'refactor/move_common_adc_part_to_hw_support' into 'master'
esp_adc: move esp_adc out of g1 dependency list

Closes IDF-5637

See merge request espressif/esp-idf!19159
2022-08-01 15:39:45 +08:00
Marius Vikhammer
af329784b1 ulp: fix missing cpp header guard
https://github.com/espressif/esp-idf/issues/9464
2022-08-01 10:19:32 +08:00
Marius Vikhammer
32efa1e92d Add ULP-RISCV print and bitbanged UART tx API
Add example to demonstrate the use of this API.
2022-07-29 12:18:01 +08:00
Armando
5e6a16380a esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
Marius Vikhammer
4f1046a292 ulp-riscv: made ulp_riscv_delay_cycles more accurate 2022-07-26 14:32:39 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Marius Vikhammer
e4cbaa6f2b ci: remove temp deepsleep tag runner 2022-07-19 12:12:46 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Fu Hanxi
f04a0cc526 fix: bypass Manually-specified variables were not used by the project warning
the variable "IDF_TARGET" is only used under a if clause
"if(ULP_C0CPU_IS_RISCV)". while building a non-riscv target,
there will be a cmake warning:

CMake Warning:
  Manually-specified variables were not used by the project:

    IDF_TARGET
2022-07-14 08:26:01 +08:00
Jiang Jiang Jian
86deb8c0f5 Merge branch 'bugfix/remove_ulp_tsens' into 'master'
ulp: remove ESP32 ULP TSENS references

Closes IDF-1485

See merge request espressif/esp-idf!18883
2022-07-11 16:31:43 +08:00
Marius Vikhammer
e8b5096f52 ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-07-11 09:31:22 +08:00
Marius Vikhammer
3d61c6d7d7 ulp: remove ESP32 ULP TSENS references
Due to poor accuracy the ESP32 ULP TSENS instructions is not recommend for use.
We keep the instruction itself to support users which are already using it,
but should remove it from examples and docs to avoid encouring any new usage of it.
2022-07-05 17:37:13 +08:00
Marius Vikhammer
c6260e66e5 system: re-enable esp_event, real_time_stats and pthread examples and test for C2 2022-06-23 02:05:46 +00:00
Marius Vikhammer
6e79cc69f9 re-enable riscv ulp gpio support and examples
Closes https://github.com/espressif/esp-idf/issues/8691
Closes https://github.com/espressif/esp-idf/issues/9094
2022-06-08 17:59:28 +08:00
Marius Vikhammer
9c4a12b11e Revert "ulp: Keep RTC_CNTL_COCPU_SHUT_RESET_EN set for ULP RISC-V"
This reverts commit f709faea7c.
2022-06-08 17:59:07 +08:00
Michael (XIAO Xufeng)
6a8aed12ee ci: partially enable ut tests for esp32c2
Disabled test cases are tracked in:

 IDF-4465, IDF-5045, IDF-5057, IDF-5058, IDF-5059, IDF-5060, IDF-5061, IDF-5131

- test_fatfs: IDF-5136

- test_pm: IDF-5053

- test_cache_mmu: IDF-5138

- test_partitions: IDF-5137

- test_vfs: IDF-5139

- test_freertos: IDF-5140

- test_wpa_supplicant: IDF-5046

- test_mbedtls: IDF-5141

- test_pthread: IDF-5142

- test_protocomm: IDF-5143

- test_lightsleep: IDF-5053

- test_taskwdt: IDF-5055

- test_tcp_transport: IDF-5144

- test_app_update: IDF-5145

- test_timer: IDF-5052

- test_spi: IDF-5146

- test_rtc_clk: IDF-5060

- test_heap: IDF-5167

ci: fixed issues for tests of libgcc, ets_timer, newlib

test_pm: support on C2
2022-06-02 14:23:35 +08:00
Djordje Nedic
facab8c5a7 tools: Increase the minimal supported CMake version to 3.16
This updates the minimal supported version of CMake to 3.16, which in turn enables us to use more CMake features and have a cleaner build system.
This is the version that provides most new features and also the one we use in our latest docker image for CI.
2022-06-01 06:35:02 +00:00
Anton Maklakov
6b15dce39c ulp test: suppress -Wstringop-overflow and -Warray-bounds 2022-05-30 11:55:27 +07:00
Anton Maklakov
6c30426777 ulp_riscv: suppress -Wstringop-overflow 2022-05-30 11:55:27 +07:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
Jing Li
ac0d16cdc8 Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master'
sleep: fix cannot lightsleep again after a wakeup from ULP

Closes IDFGH-4396

See merge request espressif/esp-idf!17970
2022-05-13 22:25:23 +08:00
jingli
ddcc5bfe38 improve ulp riscv test case
Add second sleep and wakeup test in test case `ULP-RISC-V is able to wakeup main CPU from light sleep`
2022-05-12 19:08:57 +08:00
Marius Vikhammer
c8617fe965 docs: fix all doxygen warnings
Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
2022-05-12 14:50:03 +08:00
Sudeep Mohanty
f709faea7c ulp: Keep RTC_CNTL_COCPU_SHUT_RESET_EN set for ULP RISC-V
RTC_CNTL_COCPU_SHUT_RESET_EN register was being reset during ULP RISC-V
initialization which does not let the ULP RISC-V coprocessor to reset
after it goes to halt. For proper operation of the coprocessor, it must
be reset after each cycle and hence this commit keeps
RTC_CNTL_COCPU_SHUT_RESET_EN set.
2022-04-28 13:41:07 +05:30
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component.
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
2022-04-21 12:09:43 +08:00
Marius Vikhammer
2efd009dfb ulp: temporarily disable ULP support for S3
Due to a hardware issue ULP support on S3 is temporarily disabled until a fixed is released.
Running ULP + sleep together can potentially cause permanent damage to the chip.
2022-03-25 14:19:12 +08:00
Marius Vikhammer
0cd07d907e CI: disable S3 sleep related example tests 2022-03-21 11:56:01 +08:00
Anton Maklakov
e27f1331e4 components: correct printf() placeholder for time_t
Using C99 %jd, https://en.cppreference.com/w/c/chrono/time_t
2022-03-14 14:05:47 +07:00
Sudeep Mohanty
bc82613847 Merge branch 'docs/ulp_documentation_updates' into 'master'
docs: Updated ULP documentation

Closes IDF-3306

See merge request espressif/esp-idf!17225
2022-03-03 19:16:27 +08:00
Marius Vikhammer
706a14884f Merge branch 'feature/riscv_ulp_gpio_intr' into 'master'
ULP: Add example of using GPIO to wakeup the ULP-RISCV processor

Closes IDFGH-6589

See merge request espressif/esp-idf!17288
2022-03-03 09:40:03 +08:00