alex/esp-idf
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207 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
ae6c52e9f9 Merge branch 'bugfix/fix_memory_miss_bug_v4.4' into 'release/v4.4' 
esp32c3/esp32s3: Fix cpu crash bug when wakeup from lightsleep for memory data miss (backport v4.4)

See merge request espressif/esp-idf!17826
 2022-05-19 13:47:20 +08:00
Jiang Jiang Jian
0bbdd67231 Merge branch 'bugfix/fix_s3_bbpll_calibrate_fail_bug_v4.4' into 'release/v4.4' 
ESP32S3: fix bbpll calibrate fail bug in high temperature  (backport v4.4)

See merge request espressif/esp-idf!17896
 2022-05-19 10:39:52 +08:00
chaijie
d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Michael (XIAO Xufeng)
e119d6cb06 pm: add powerdown for int_8m on ESP32-H2 
Also move the xtal fpu logic to sleep_modes.c
 2022-05-16 00:59:36 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-12 15:57:09 +08:00
jingli
a2f141807f fix rtc mem load err(since the voltage of rtc regulator is too low) 2022-05-01 23:29:12 +08:00
chaijie
fe83802d65 fix c3 brownout bug after deepsleep 2022-04-28 18:23:28 +08:00
chaijie
a86cad6afe fix s3 bbpll calibrate fail bug in high temperature 2022-04-25 18:21:10 +08:00
Michael (XIAO Xufeng)
d378ca2b78 esp_phy: use spinlock to avoid regi2c access conflicts 2022-04-06 12:18:23 +08:00
laokaiyao
19faa6ef43 touch: fix the touch sensor wait cycle on s3 2022-03-11 06:24:07 +00:00
Armando
32afe6a498 sleep: restore analog calibration registers after waking up from light sleep 
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
 2022-03-07 11:28:48 +08:00
Cao Sen Miao
a74e06560b USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2022-02-15 18:56:06 +08:00
Michael (XIAO Xufeng)
c2c4b126f7 Merge branch 'feature/support_new_psram_v4.4' into 'release/v4.4' 
psram: add ESP32-D0WD-R2-V3 support(backport v4.4)

See merge request espressif/esp-idf!16705
 2022-02-13 14:13:38 +00:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3) 
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
 2022-01-27 12:40:27 +08:00
Cao Sen Miao
e2ef65e117 psram: add ESP32-D0WD-R2-V3 support 2022-01-10 10:39:00 +08:00
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling 
Set maximum RNG query frequency to save value known from tests
 2022-01-03 16:24:41 +05:30
Armando
4a429d59ac adc: update adc calibration efuse version 
ADC calibration scheme and algorithm are not changed. Only the eFuse bit BLOCK1_VERSION is changed. This MR updated the logic to recognize the adc efuse version
 2021-12-13 13:03:23 +08:00
jingli
1d6c95000b reduce bootup time when using usb-serial-jtag 2021-12-03 20:50:22 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe 
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
 2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Armando
16a91399f1 psram: put opiram_psram and spiram_psram in internal ram 
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
 2021-10-08 17:39:41 +08:00
Armando
7ff9332243 rtc: fix mspi timing issue when self-calibrate ocode 
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.

This is a temporary fix
 2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b mspi: fix psram cs timing register setting not in iram bug 2021-10-08 15:59:57 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
Martin Vychodil
5344de34c3 System/Memprot: fixed voltage glitching detection logic 
When the application is being debugged it should check the call result (esp_cpu_in_ocd_debug_mode())
is not given volt.glitch attack - so the result is triple-checked by ESP_FAULT_ASSERT macro. In case
the check fails, the system is reset immediately

IDF-4014
 2021-10-04 09:21:07 +02:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d Merge branch 'feature/rename_apbctrl_to_syscon' into 'master' 
rename apbctrl to syscon

See merge request espressif/esp-idf!14524
 2021-09-16 12:58:07 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
Armando (Dou Yiwen)
b9ea273e78 Merge branch 'feature/suppport_self_icode_calibration_on_s3' into 'master' 
adc: support self calibration icode on s3

Closes IDF-3913

See merge request espressif/esp-idf!15195
 2021-09-16 11:14:58 +00:00
Armando
ddd0235783 adc: support adc self-calibration on esp32s3 2021-09-16 15:17:29 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Li Shuai
b59902f4d1 Merge branch 'bugfix/esp32s3_lightsleep_psram_leakage_current' into 'master' 
fix SPIRAM leakage when its CS pin has no hardware pullup

See merge request espressif/esp-idf!14730
 2021-09-16 04:07:58 +00:00
Armando
ea10dacf68 mspi: add octal psram get_cs_io function 2021-09-15 20:34:18 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
Sachin Parekh
0e6b03f343 esp32s2/hmac: Release HMAC lock in downstream mode incase of failure 2021-09-06 11:21:39 +05:30
Sachin Parekh
fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Sachin Billore
f80d6f8c21 Digital Signature support for S3 
Closes IDF-1791
 2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
Armando (Dou Yiwen)
5f38b766a8 Merge branch 'feature/support_120mhz_quad_psram_quad_flash' into 'master' 
mspi: support 120MHz clock freq on QSPI flash/psram on ESP32-S3

Closes IDF-3711

See merge request espressif/esp-idf!14849
 2021-09-01 02:46:05 +00:00
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
Marius Vikhammer
2e0cab6f94 himem: reverse error check logic in himem 2021-08-31 08:46:27 +08:00
SalimTerryLi
55a5c444b5
rtc_io, esp_himem: replace XXX_CHECK with ESP_RETURN_ON_FALSE 2021-08-30 11:18:34 +08:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead 
JIRA IDF-3634
 2021-08-26 09:20:00 +02:00
Shu Chen
f8f9e545e8 Merge branch 'feature/support_esp32h2_hw_support' into 'master' 
Feature/support esp32h2 hw support

Closes IDF-3378 and IDF-3396

See merge request espressif/esp-idf!14545
 2021-08-26 06:00:27 +00:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
morris
a861575d05 Merge branch 'bugfix/fix_esp32c3_auto_adjust_volt' into 'master' 
system: fix esp32c3 auto adjust voltage bug

See merge request espressif/esp-idf!14725
 2021-08-26 02:53:22 +00:00
sly
b342b49823 fix esp32c3 auto adjust voltage bug 2021-08-25 17:08:26 +08:00
Wu Zheng Hui
3128a2544b Adjust the variable name & 
Add mapping support for different sizes of spi ram
 2021-08-25 16:06:28 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Marius Vikhammer
53975c444c Merge branch 'update_copyright_notice_esp_hw_support_5' into 'master' 
esp_hw_support: update copyright notice 5

See merge request espressif/esp-idf!14729
 2021-08-13 08:40:47 +00:00
Marius Vikhammer
465830312b Merge branch 'update_copyright_notice_esp_hw_support_4' into 'master' 
esp_hw_support: update copyright notice 4

See merge request espressif/esp-idf!14728
 2021-08-13 08:40:15 +00:00
Jakob Hasse
1c3be690ed [esp_hw_support]: HMAC upstream support for S3 2021-08-13 12:01:06 +08:00
Jan Brudný
5195b6a237 esp_hw_support: update copyright notice 5 2021-08-10 13:32:08 +02:00
Jan Brudný
f51e20d814 esp_hw_support: update copyright notice 4 2021-08-10 13:31:53 +02:00
Jan Brudný
7f50818a99 esp_hw_support: update copyright notice 3 2021-08-10 13:30:57 +02:00
Jan Brudný
562ce4d009 esp32s2, esp32s3: update copyright notice 2021-08-05 15:01:26 +02:00
Armando (Dou Yiwen)
03fb3973a2 Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master' 
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3

Closes IDF-3603

See merge request espressif/esp-idf!14346
 2021-08-04 03:57:16 +00:00
Armando
0f91a01a46 mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3 2021-08-03 16:54:00 +08:00
Konstantin Kondrashov
4972605b16 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
Armando (Dou Yiwen)
0dad76329f Merge branch 'feature/support_noinit_section_in_psram_on_esp32' into 'master' 
memory: support noinit section in psram on esp32

Closes IDFGH-2621

See merge request espressif/esp-idf!14088
 2021-07-31 09:58:59 +00:00
morris
21067a0455 spiram: add getter function to check psram initialization state 2021-07-30 11:23:26 +08:00
Armando
ad8e1a395c memory: port SPIRAM noinit segment support to master 2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f esp32: Add support for noinit variables in SPIRAM 
Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.

This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.

The EXT_RAM_NOINIT_ATTR macro places variables in this section.
 2021-07-29 10:28:38 +08:00
Alex Henrie
f88a2f10c2 Fix memory leak on error path in esp_ds_start_sign 2021-07-23 17:48:45 +05:30
Jiang Jiang Jian
af9cb85e00 Merge branch 'feature/support_esp32s3_rtc_hw_support' into 'master' 
esp_hw_support: add rtc module support for esp32s3

See merge request espressif/esp-idf!14368
 2021-07-20 03:23:10 +00:00
sly
d6762a9fb7 esp_hw_support: add rtc module support for esp32s3 2021-07-19 11:17:48 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Michael (XIAO Xufeng)
59195b6fb3 Merge branch 'bugfix/update_gdma_soc' into 'master' 
gdma: alignment setting for PSRAM transfer

Closes IDF-1524

See merge request espressif/esp-idf!13976
 2021-07-17 14:04:03 +00:00
Angus Gratton
f0471b18b2 esp32h2: Move from target component to esp_hw_support (new structure) 2021-07-16 20:14:27 +08:00
Renz Bagaporo
844af01eb4 esp32: move spiram, himem 2021-07-16 20:14:26 +08:00
Renz Bagaporo
452bfda367 esp32: move dport_access 2021-07-16 20:14:26 +08:00
Renz Bagaporo
702e41e1c8 esp32s2: move crypto related functions 2021-07-16 20:14:26 +08:00
Renz Bagaporo
ea2aafbb7a esp32s2: move memprot api 2021-07-16 20:14:26 +08:00
morris
d9819bc7ae gdma: set transfer ability 2021-07-16 14:47:09 +08:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image 
Includes fix for detecting ESP32 ECO3 on FPGA
 2021-07-16 10:50:06 +10:00
Angus Gratton
bbbbd5cf0c esp32s2: FPGA can boot to Hello World 2021-07-16 10:50:06 +10:00
Angus Gratton
8cc8c60b45 soc esp32s2: Use constant for XTAL value 
ESP32-S2 only supports a 40MHz crystal.
 2021-07-16 10:50:06 +10:00
Angus Gratton
192b5925da bootloader: Can boot to IDF scheduler start on internal-use FPGA 
On ESP32 & ESP32-S2. Patch doesn't include changes to make the app run fully.
 2021-07-16 10:50:06 +10:00
Almir Okato
06a849b33e rtc: Add missing esp_rom_sys.h header in rtc clk 
rtc_clk.c for esp32, esp32s2 and esp32s3 did not include the
esp_rom_sys.h header which could cause implicit declaration issues for
some function calls.
 2021-07-01 12:50:14 -03:00
Michael (XIAO Xufeng)
0e31332693 Merge branch 'feature/add_esp32h2_target' into 'master' 
esp32h2: add esp32h2 build target

See merge request espressif/esp-idf!13944
 2021-07-01 14:46:37 +00:00
Krzysztof Budzynski
f0b2926d70 Merge branch 'docs/s3_get_started' into 'master' 
docs: updated getting started for S3

Closes IDF-3281 and IDF-3282

See merge request espressif/esp-idf!14174
 2021-07-01 14:33:55 +00:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
5e3689ae0f esp32h2: update esp_system and esp_hw_support to support esp32h2 2021-07-01 19:53:11 +08:00
Shu Chen
7d4b2617e1 esp32h2: copy esp_system and esp_hw_support from esp32c3 
Copy the esp32c3 code without any change:
 * components/esp_hw_support/include/soc/esp32h2
 * components/esp_hw_support/port/esp32h2
 * components/esp_system/port/soc/esp32h2
 2021-07-01 19:53:11 +08:00
Angus Gratton
2f8debdde1 Merge branch 'feature/esp32s3_remove_rtc_apb_freq_reg' into 'master' 
esp32s3: Remove APB frequency RTC register

See merge request espressif/esp-idf!11137
 2021-06-29 23:50:23 +00:00
Jiang Jiang Jian
d28417edbc Merge branch 'bugfix/deep_sleep_rtcwdt_rst_issue' into 'master' 
clear wakeup and reject int raw signal before entry sleep

Closes FCS-673

See merge request espressif/esp-idf!13982
 2021-06-29 13:31:40 +00:00
Marius Vikhammer
638485b222 docs: updated getting started and other misc. guides for S3 2021-06-29 15:44:45 +08:00
Angus Gratton
57fa883127 esp32s3: Remove APB frequency RTC register 
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
 2021-06-29 17:38:46 +10:00
Li Shuai
6ca207531b deep sleep: clear wakeup and reject int raw signal before entry sleep 2021-06-29 11:59:54 +08:00
Marius Vikhammer
ee2f8b1a62 build system: always build with -fno-jump-tables & -fno-tree-switch-conversion 
Jump tables placed in flash would cause issue with code that needed to be ran from IRAM.

These optimizations are now always disabled.
 2021-06-24 14:54:10 +08:00
David Cermak
26f9d2d5e1 rtc: Fix minor const char* correction issue 2021-06-10 22:22:48 +08:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3 
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
 2021-06-07 10:40:14 +08:00