This commit includes the refactoring of the core dump feature. Thanks to
this refactoring, it is easier to integrate the support of RISC-V
architecture for this feature.
Fixes ESP-1758
It is not possible to write to Flash when the stack is located in
PSRAM, and it is not possible to write PSRAM buffers into Flash when
malloc can not be used.
This adds detection of UART core dumps to IDF monitor. By default,
core dumps are not printed to the console, but are processed by
espcoredump.py using 'info_corefile' command. The result is printed
to stdout.
This feature can be disabled in menuconfig.
In the future this can be extended to allow running espcoredump.py
with 'dbg_corefile' argument, which is similar to the current GDB Stub
behavior.
Related to IDF-52.
When legacy mode is used, the coredump still fails during linking
because "esp_flash_init_default_chip", "esp_flash_app_init" and
"esp_flash_default_chip " are not compiled and linked.
Instead of using ``if`` macros in callers, these functions are protected
by ``if`` macros in the header, and also not compiled in the sources.
"esp_flash_default_chip" variable is compiled with safe default value.
spi_flash has been updated and its functions work from flash by default instead of IRAM that cause issue
add Kconfig value into espcoredump to enable spi_flash legacy mode (CONFIG_SPI_FLASH_USE_LEGACY_IMPL) when core dump is selected
fix spi_flash issues to work correctly with legacy mode when CONFIG_SPI_FLASH_USE_LEGACY_IMPL is used
Move existing core dump files into espcoredump component folder
Add KConfig, linker.lf, make and CMakeList.txt for new component
Existing functionality separated into core_dump_common, core_dump_flash, core_dump_uart
Update test_core_dump.c and make files to link it as unit test
Update according to review:
Move target and RTOS related functionality into separated file (core_dump_port.c).
