6 Commits

Author	SHA1	Message	Date
Marius Vikhammer	386739595f	RISCV-ULP: Add DS18B20 1wire RISCV-ULP example	2021-06-25 11:26:39 +08:00
Renz Bagaporo	754c8fcaa5	ci: modify ulp_riscv example to detect unintended wake	2021-03-31 17:15:55 +08:00
Renz Bagaporo	e5b3824f61	ci: add example test for ulp_riscv example	2021-02-26 13:34:09 +08:00
Angus Gratton	66d2c9196f	example ulp_riscv: Set IDF_TARGET to esp32s2	2020-12-24 14:18:02 +11:00
Angus Gratton	66fb5a29bb	Whitespace: Automated whitespace fixes (large commit) ... Apply the pre-commit hook whitespace fixes to all files in the repo. (Line endings, blank lines at end of file, trailing whitespace)	2020-11-11 07:36:35 +00:00
Felipe Neves	b6dba84323	ulp: added support to building code for riscv ULP coprocessor	2020-07-15 15:28:49 -03:00