8 Commits

Author	SHA1	Message	Date
baohongde	a3188d7fd9	Fix live lock in bt isr immediately	2020-07-20 17:10:04 +08:00
Li Shuai	c69c066641	Fix live lock int bt isr using cod multicore debug	2020-07-20 17:10:04 +08:00
baohongde	44985f00d3	components/bt: Disable exception mode after saving special registers ... To store some registers first, avoid stuck due to live lock after disabling exception mode	2020-07-20 17:10:04 +08:00
baohongde	5e6824e3ea	Revert "fix live lock in bt isr immediately" ... This reverts commit dd086a332315dedf5e326050c6dbed5e6a7eed18.	2020-07-20 17:10:04 +08:00
baohongde	a77867d302	fix live lock in bt isr immediately ... fix too many live lock	2020-07-20 17:10:01 +08:00
baohongde	a172605af4	components/bt: using high level interrupt in lc	2020-04-17 23:16:59 +08:00
baohongde	f490b4ddfe	hli: don't spill registers, instead save them to a separate region ... Level 4 interrupt has a chance of preempting a window overflow or underflow exception. Therefore it is not possible to use standard context save functions, as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4). Instead, mask window overflows and save the entire general purpose register file, plus some of the special registers. Then clear WindowStart, allowing the C handler to execute without spilling the old windows. On exit from the interrupt handler, do everything in reverse.	2020-04-17 23:09:50 +08:00
baohongde	918472f641	Feature: high level interrupt(5)	2020-04-17 23:09:04 +08:00