alex/esp-idf
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22,568 Commits 20 Branches 148 Tags 384 MiB
6356453f8d
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84 Commits

Author SHA1 Message Date
Li Shuai
6356453f8d sleep: fix sleep current issue caused by sar adc 2023-04-20 11:43:13 +08:00
Armando
1b2a254d71 adc: improve power logic 2023-04-20 10:42:12 +08:00
liuning
dce377bcfd rtc_sleep: workaround systimer stall issue during lightsleep on ESP32C3 2023-04-14 11:59:42 +08:00
wuzhenghui
91b9483987 Revert "optimize deep sleep current in wifi softap mode" 
This reverts commit 344ec80fad.
 2023-03-13 20:41:16 +08:00
KonstantinKondrashov
a86c80e3ec all: Apply new version logic (major * 100 + minor) 2023-03-03 22:26:39 +00:00
KonstantinKondrashov
e59269efa0 esp_hw_support: Fix version in esp_chip_info for C3 and H2 2022-12-20 21:14:36 +08:00
KonstantinKondrashov
26960f1734 efuse: Adds major and minor versions and others 2022-12-20 16:30:13 +08:00
morris
193d0d6b6e Merge branch 'bugfix/fix_rtc8m_calibration_fail_after_cpu_core_reset_v4.4' into 'release/v4.4' 
rtc_clk: Fix rtc8m calibration failure after cpu/core reset (backport v4.4)

See merge request espressif/esp-idf!20553
 2022-11-10 10:04:35 +08:00
Jiang Jiang Jian
d7ba7c3b19 Merge branch 'bugfix/fix_esprv_intc_int_set_type_err_parameter_backportv4.4' into 'release/v4.4' 
bugfix: esprv_intc_int_set_type should not use bitmap parameter(backport v4.4)

See merge request espressif/esp-idf!20609
 2022-11-09 18:03:25 +08:00
wuzhenghui
0fd3824f91 bugfix: esprv_intc_int_set_type should not use bitmap parameter 2022-10-14 15:33:53 +08:00
Song Ruo Jing
883e54aa71 rtc_clk: Fix rtc8m calibration failure after cpu/core reset 
Explicitly guarantee 8md256 clk is enabled before calibration
 2022-10-12 12:33:47 +08:00
cje
c34e900969 fix C3 system not stable bug when dbias storing in efuse is bigger than 27 2022-10-08 11:55:26 +08:00
jingli
13984c0a79 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 15:11:04 +08:00
Song Ruo Jing
b2f4fc022a rtc_clk: Fix wrong RC_FAST and RC_SLOW clock frequency values on ESP32C3 and ESP32S3 2022-08-19 12:21:11 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-06-05 02:33:50 +08:00
morris
0340c2f2bc Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4' 
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)

See merge request espressif/esp-idf!18075
 2022-05-30 09:54:39 +08:00
Michael (XIAO Xufeng)
ae6c52e9f9 Merge branch 'bugfix/fix_memory_miss_bug_v4.4' into 'release/v4.4' 
esp32c3/esp32s3: Fix cpu crash bug when wakeup from lightsleep for memory data miss (backport v4.4)

See merge request espressif/esp-idf!17826
 2022-05-19 13:47:20 +08:00
chaijie
d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-12 15:57:09 +08:00
chaijie
fe83802d65 fix c3 brownout bug after deepsleep 2022-04-28 18:23:28 +08:00
Michael (XIAO Xufeng)
d378ca2b78 esp_phy: use spinlock to avoid regi2c access conflicts 2022-04-06 12:18:23 +08:00
Armando
32afe6a498 sleep: restore analog calibration registers after waking up from light sleep 
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
 2022-03-07 11:28:48 +08:00
Cao Sen Miao
a74e06560b USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2022-02-15 18:56:06 +08:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3) 
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
 2022-01-27 12:40:27 +08:00
jingli
1d6c95000b reduce bootup time when using usb-serial-jtag 2021-12-03 20:50:22 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Martin Vychodil
5344de34c3 System/Memprot: fixed voltage glitching detection logic 
When the application is being debugged it should check the call result (esp_cpu_in_ocd_debug_mode())
is not given volt.glitch attack - so the result is triple-checked by ESP_FAULT_ASSERT macro. In case
the check fails, the system is reset immediately

IDF-4014
 2021-10-04 09:21:07 +02:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
morris
a861575d05 Merge branch 'bugfix/fix_esp32c3_auto_adjust_volt' into 'master' 
system: fix esp32c3 auto adjust voltage bug

See merge request espressif/esp-idf!14725
 2021-08-26 02:53:22 +00:00
sly
b342b49823 fix esp32c3 auto adjust voltage bug 2021-08-25 17:08:26 +08:00
Jan Brudný
7f50818a99 esp_hw_support: update copyright notice 3 2021-08-10 13:30:57 +02:00
Renz Bagaporo
452bfda367 esp32: move dport_access 2021-07-16 20:14:26 +08:00
Renz Bagaporo
702e41e1c8 esp32s2: move crypto related functions 2021-07-16 20:14:26 +08:00
Renz Bagaporo
ea2aafbb7a esp32s2: move memprot api 2021-07-16 20:14:26 +08:00
Jiang Jiang Jian
d28417edbc Merge branch 'bugfix/deep_sleep_rtcwdt_rst_issue' into 'master' 
clear wakeup and reject int raw signal before entry sleep

Closes FCS-673

See merge request espressif/esp-idf!13982
 2021-06-29 13:31:40 +00:00
Li Shuai
6ca207531b deep sleep: clear wakeup and reject int raw signal before entry sleep 2021-06-29 11:59:54 +08:00
Marius Vikhammer
ee2f8b1a62 build system: always build with -fno-jump-tables & -fno-tree-switch-conversion 
Jump tables placed in flash would cause issue with code that needed to be ran from IRAM.

These optimizations are now always disabled.
 2021-06-24 14:54:10 +08:00
Omar Chebib
dd8843fec3 regi2c: add a spinlock for accessing (reg)I2C devices 
When not compiling bootloader, a spinlock will be used for reading or writing
I2C internal devices/registers.
When compiling for bootloader, no need to use any lock.
 2021-05-13 11:55:41 +08:00
Jiang Jiang Jian
3c30e688c4 Merge branch 'feature/support_auto_adjust_voltage_storingInEfuse_openGlitchRst' into 'master' 
ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3

See merge request espressif/esp-idf!13395
 2021-05-13 03:49:59 +00:00
chaijie
eea76d14bb ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3 
1. add some efuse api to get rtc & digital voltage
2. set dig_rtc voltage to a fix value storing in efuse no mater which cpu frequency
3. modify hardware code in bootloader to fit all c3 ECO3 version
 2021-05-08 17:56:54 +08:00