Martin Vychodil
69096ddce5
Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
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Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)
Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Michael (XIAO Xufeng)
c99e891201
Merge branch 'feature/sync_adc_changes_from_c3_to_master_last' into 'master'
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adc: sync adc changes from c3 to master (last time)
Closes IDF-2694
See merge request espressif/esp-idf!12134
2021-01-26 12:52:20 +08:00
Michael (XIAO Xufeng)
2b83418141
adc: add fallback calibration method
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Also:
1. Separate static configuration into init phase to improve
performance
2. Add a init code config layer to avoid duplicated configuration
3. Add a HW_CALIBRATION_V1 caps
2021-01-25 20:30:42 +08:00
KonstantinKondrashov
3ed226c362
efuse(esp32c3): Adds getting chip_revision and chip_pkg
2021-01-25 19:37:40 +08:00
Michael (XIAO Xufeng)
7a20ea5f0e
Merge branch 'feature/support_flash_sus_res_c3' into 'master'
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spi_flash: Add flash auto-suspend auto-resume mode on esp32c3
Closes IDF-2591
See merge request espressif/esp-idf!11888
2021-01-25 17:41:32 +08:00
Armando
f9ec7ddda3
adc: add comment for ADC sampling frequency
2021-01-25 04:51:40 +00:00
Michael (XIAO Xufeng)
90fc3e7030
adc: update the monitor and filter in the HAL on C3
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On C3 ADC has no enable bit for monitor and filter. However we can use context variables to implement one
2021-01-25 04:51:40 +00:00
Michael (XIAO Xufeng)
d7d1dee208
system: reset dma when soft reset
2021-01-25 04:51:40 +00:00
Cao Sen Miao
9905da46e0
spi_flash: Add auto suspend mode on esp32c3
2021-01-25 11:14:02 +08:00
Angus Gratton
fe8a891de9
Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
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bootloader/esp32c3: Support secure boot
Closes IDF-2115
See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
Michael (XIAO Xufeng)
db45f00860
Merge branch 'bugfix/fix_esp32c3_rf_40M_loss_package_bug' into 'master'
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esp32c3: fix rf 40M loss package bug when CPU run 80M
See merge request espressif/esp-idf!12057
2021-01-20 18:48:52 +08:00
Angus Gratton
cfdd7f0f22
Merge branch 'feature/c3_crypto_gdma' into 'master'
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AES/SHA: GDMA crypto driver
Closes IDF-2192 and IDF-2501
See merge request espressif/esp-idf!12014
2021-01-20 16:42:39 +08:00
Li Shuai
3170ecf268
deep sleep: add empty interface rtc_deep_sleep_start for esp32c3
2021-01-20 13:28:34 +08:00
KonstantinKondrashov
98f726fa4b
bootloader/esp32c3: Adds secure boot (not yet supported)
2021-01-19 20:51:13 +08:00
Li Shuai
f168ac3b39
light sleep: add cpu power down support for esp32c3
2021-01-19 14:51:50 +08:00
Li Shuai
a43de3a44b
fix set UART_FORCE_XOFF
can't stop new Tx request issue
2021-01-19 14:51:22 +08:00
Li Shuai
6d12fdd6e7
light sleep: add gpio configure workaround at slept status for esp32c3
2021-01-19 14:51:22 +08:00
Li Shuai
ac7d1bec76
light sleep: overhead time accuracy optimization for esp32c3
2021-01-19 14:50:58 +08:00
Li Shuai
aa7fd175b9
light sleep: light sleep support for esp32c3
2021-01-19 14:50:58 +08:00
chaijie
180d3fe44a
esp32c3: fix rf 40M loss package bug
2021-01-19 14:09:00 +08:00
Marius Vikhammer
51169b0e0c
AES/SHA: use GDMA driver instead of LL
2021-01-19 11:02:51 +08:00
Marius Vikhammer
0713e93b8f
TWAI: bringup for S3 and C3
2021-01-14 20:30:31 +08:00
morris
e6d23a35ec
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
Chen Jian Xing
5b44295cb9
esp_wifi: fix esp32c3 code issues
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1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
Angus Gratton
5b68cf9de4
Merge branch 'feature/c3_ds' into 'master'
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ESP32-C3 Digital Signature, HAL layer for DS.
Closes IDF-2111
See merge request espressif/esp-idf!10813
2021-01-07 13:07:28 +08:00
morris
7a71cedf87
interrupt: filter out reserved int number by decoding risc-v JAL instruction
2021-01-05 15:39:46 +08:00
morris
9e7d2c0065
esp32c3: format and clean up interrupt and os port code
2021-01-05 15:39:46 +08:00
Felipe Neves
5d316ac142
interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps
2021-01-05 15:39:46 +08:00
Jakob Hasse
e532a29288
[Peripheral/Security] DS peripheral driver
2021-01-05 12:26:59 +08:00
chaijie
d505474f78
1. Fix CPU switch to 160M issue;
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2. increase lightsleep voltage to make sure wakeup successfully;
3. add judgement code to whether wait or not when switch CPU frequency.
2020-12-30 12:32:31 +08:00
Marius Vikhammer
eb788deb03
esp_hw_support: merge C3 changes to master
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Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Marius Vikhammer
1b6891c5d8
mbedtls: merge changes from C3
2020-12-29 10:56:13 +08:00
Angus Gratton
b7f4c46a82
soc: Update esp32c3 soc headers
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From internal commit 6d894813
2020-12-24 10:47:34 +11:00
Angus Gratton
6d6510c39b
soc: Move esp32c3 soc_memory_layout.c to soc component
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Was incorrectly placed in esp_hw_support
2020-12-23 11:49:16 +11:00
Armando
2d37bfa126
driver: Add adc_digi single conversion mode
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- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates
[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
2020-12-23 09:53:24 +11:00
Angus Gratton
fa892eb017
soc: Explain units for rtc_clk_cal() function, fix typo
2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df
rtc: add function to en/disable the rtc clock
2020-12-23 09:53:24 +11:00
Angus Gratton
f09b8ae7a4
driver: Add esp32c3 ADC driver
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Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Angus Gratton
27a9cf861e
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
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Some ESP32-C3 drivers are still pending.
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Cao Sen Miao
0736c91d68
soc: Remove cache constants from soc.h
2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
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Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Armando
d393699ab6
uart: bringup on esp32c3
2020-11-30 15:23:15 +11:00
Angus Gratton
c29d93986d
soc: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00