Commit Graph

129 Commits

Author SHA1 Message Date
Angus Gratton
a67d5d89e0 Replace all DOS line endings with Unix
Command run was:
git ls-tree -r HEAD --name-only | xargs dos2unix
2018-07-12 19:10:37 +08:00
Ivan Grokhotkov
59c96ae331 Merge branch 'bugfix/spi_flash_deadlock' into 'master'
spi_flash: raise priority of the task performing spi_flash operation

See merge request idf/esp-idf!2609
2018-07-02 18:39:16 +08:00
Anton Maklakov
f42b91fe46 spi_flash: fix errors for GCC 8 support
components/spi_flash/partition.c: In function 'load_partitions':
components/spi_flash/partition.c:179:66: error: argument to 'sizeof' in 'strncpy' call is the same expression as the source; did you mean to use the size of the destination? [-Werror=sizeof-pointer-memaccess]
         strncpy(item->info.label, (const char*) it->label, sizeof(it->label));
                                                                  ^
2018-07-02 09:05:00 +00:00
Ivan Grokhotkov
f9f2937694 spi_flash: raise priority of the task performing spi_flash operation
The fix is for the situation when cache disabling mechanism causes
a deadlock with user tasks. Situation is as follows:

1. spi_flash operation is started from low-priority task on CPU0
2. It uses IPC to wake up high-priority IPC1 task on CPU1, preventing
   all other tasks on CPU1 from running. This is needed to safely
   disable the cache.
3. While the task which started spi_flash operation is waiting for IPC1
   task to acknowledge that CPU1 is not using cache anymore, it is
   preempted by a higher priority application task ("app0").
4. Task app0 busy-waits for some operation on CPU1 to complete. But
   since application tasks are blocked out by IPC1 task, this never
   happens. Since app0 is busy-waiting, the task doing spi flash
   operation never runs.

The more or less logical soltion to the problem would be to also do
cache disabling on CPU0 and the SPI flash operation itself from IPC0
task. However IPC0 task stack would need to be increased to allow doing
SPI flash operation (and IPC1 stack as well). This would waste some
memory. An alternative approach adopted in this fix is to call FreeRTOS
functions to temporary increase the priority of SPI flash operation task
to the same level as the IPC task.

Fixes https://github.com/espressif/arduino-esp32/issues/740
Fixes https://github.com/espressif/esp-idf/issues/1157
2018-07-01 20:44:42 +08:00
Konstantin Kondrashov
17dac0d273 spi_flash: Fix error unit tests on host
IDF had two defines ESP_PARTITION_TABLE_OFFSET and ESP_PARTITION_TABLE_ADDR. They were the same and equal by 0x8000.
A define ESP_PARTITION_TABLE_ADDR was removed from IDF.
A define ESP_PARTITION_TABLE_OFFSET depends on option CONFIG_PARTITION_TABLE_OFFSET in Kconfig.

Now using only #define ESP_PARTITION_TABLE_OFFSET CONFIG_PARTITION_TABLE_OFFSET
2018-06-19 14:30:25 +05:00
Angus Gratton
43b6c76bba Merge branch 'feature/expansion_space_for_bootloader' into 'master'
partition_table: Moving to custom offset

See merge request idf/esp-idf!2263
2018-06-18 12:34:53 +08:00
Angus Gratton
59ab2136e8 Merge branch 'doc/kconfig_item' into 'master'
doc: fix the level inconsistent issue in Kconfig document

See merge request idf/esp-idf!2460
2018-06-14 12:51:50 +08:00
Konstantin Kondrashov
3e0ac4db79 partition_table: Expanding the space under the bootloader
Allows you to move the partition table, it gives more space for the bootloader.
Added a new utility - parttool.py. This utility can search for the offset and/or size of the partitions by name and type/subtype. Use for getting APP_OFFSET and PHY_DATA_OFFSET.
The linker(esp32.bootloader.ld) made changes that allow you to write a custom bootloader code more.

TW14125
2018-06-08 18:47:29 +05:00
Renz Bagaporo
8caab13faa spi_flash: Enable flash emulation down to ROM function calls 2018-06-06 17:35:30 +00:00
Renz Bagaporo
e542b7a920 spiffs: Make spiffs runnable on host
Makes spiffs component runnable on host. Depends on the host library build
of flash emulator. Includes a basic sanity test of
mounting a volume, opening a file, writing to the file, reading the file,
closing the file and unmounting volume.
2018-06-06 17:35:30 +00:00
Renz Bagaporo
af629b3547 fatfs: Make fatfs runnable on host
Makes fatfs component runnable on host. Depends on the host library build
of wear levelling and flash emulator. Includes a basic sanity test of
mounting a volume, opening a file, writing to the file, reading the file,
closing the file and unmounting volume.
2018-06-06 17:35:30 +00:00
Renz Bagaporo
893003357a wl, spi_flash: Make wl API runnable on host
Makes the entirety of the wl API runnable on host. Flash emulator
is separated into spi_flash component directory to be reused by
other storage components.
2018-06-06 17:35:30 +00:00
michael
3ba8461928 doc: fix the level inconsistent issue in Kconfig document 2018-06-05 10:36:18 +00:00
Ivan Grokhotkov
cb649e452f remove executable permission from source files 2018-05-29 20:07:45 +08:00
Konstantin Kondrashov
8f80cc733d soc: Change DPORT access
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.

The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
2018-05-14 17:54:57 +05:00
Tian Zhong Xing
49a236dae0 fix CI failed when flash chip size if 2MBytes 2018-03-29 17:48:59 +08:00
Tian Zhong Xing
fa68774344 spi_flash:
1. add test code for new api
2. resolve some comments
2018-03-26 10:24:42 +08:00
Tian Zhong Xing
7555031553 add api get valid mmu table pages number 2018-03-16 10:40:55 +08:00
XuanZe
573876700b fix : esp_partition_find missing ` `
Signed-off-by: krzychb <krzychb@gazeta.pl>
2018-03-08 09:39:20 +01:00
Angus Gratton
b52b4ea2cc spi_flash: Update docs 2018-02-22 10:28:26 +11:00
Deng Xin
337f790fd3 bug fix of assert happen in PSRAM 2018-01-09 20:01:06 +08:00
Angus Gratton
f7ac41c2da spi_flash: Add option to log warnings if (spuriously) writing zero bits to ones
Won't work for SPIFFS, maybe some other implementations?
2017-12-04 09:55:05 +11:00
Angus Gratton
892b3ff14b spi_flash: Add option to verify all writes by reading back data
Helpful when debugging SPI flash hardware related issues.

TW15203
2017-12-04 09:55:05 +11:00
Angus Gratton
7a924bd85a spi_flash: Expose an accessor the current SPI flash guard functions
Change places which uses g_flash_guard_default_ops to use this. Probably exact same data, but a bit
cleaner.
2017-11-20 15:54:31 +11:00
Angus Gratton
e72e5a9706 spi_flash: Make spi_flash op_lock/op_unlock recursive
Allows chaining of multiple flash operations as an atomic operation.
2017-11-20 15:54:31 +11:00
Angus Gratton
670733df9f spi_flash: Abort on writes to dangerous regions (bootloader, partition table, app)
Can be disabled or made into a failure result in kconfig if needed.
2017-11-03 15:52:27 -07:00
Ivan Grokhotkov
fbd52dcf34 spi_flash: fix build error with profiling enabled 2017-10-22 12:57:56 +08:00
Ivan Grokhotkov
59b7d98fec Merge branch 'feature/dfs' into 'master'
Dynamic frequency scaling

See merge request !1189
2017-10-22 12:34:11 +08:00
Ivan Grokhotkov
8990549e89 spi_flash: fix spi_flash_read into buffer in external RAM, add test 2017-10-19 21:35:21 +08:00
Ivan Grokhotkov
ee99bdfbad spi_flash_cache_enabled: report correct result in single core mode 2017-10-19 21:35:21 +08:00
Ivan Grokhotkov
cc67500d3e unit test: adapt tests to single core configuration 2017-10-19 21:35:21 +08:00
Ivan Grokhotkov
bfeecd2b56 freertos: deprecate XT_CLOCK_FREQ
- freertos: add deprecated definition for XT_CLOCK_FREQ
- flash_ops: don't use XT_CLOCK_FREQ
- unity: don't use XT_CLOCK_FREQ
- hw_random: don't use XT_CLOCK_FREQ
- core_dump: don't use XT_CLOCK_FREQ
- app_trace: don't use XT_CLOCK_FREQ
- xtensa_init: init xt_tick_divisor
2017-10-18 14:19:19 +08:00
Jeroen Domburg
740f8a79f0 Add logic to make external RAM usable with malloc() 2017-09-28 17:17:50 +08:00
Jeroen Domburg
b24d2c4cf3 Make sure cache is disabled/enabled when *both* CPUs are running inside the iram guard code 2017-09-06 16:34:36 +08:00
Jeroen Domburg
34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00
Ivan Grokhotkov
fb43948413 Update several Kconfig files to make help texts compatible with ReST 2017-08-22 14:34:19 +08:00
Angus Gratton
17adb40ca8 bootloader: Calculate SHA256 hash of image on every boot
Makes app image booting more reliable (256-bit rather than 8-bit verification.)

Some measurements, time to boot a 655KB app.bin file and run to app_main() execution.

(All for rev 1 silicon, ie no 340ms spurious WDT delay.)

80MHz QIO mode:
before = 300ms
after = 140ms

40MHz DIO mode:
before = 712ms
after = 577ms

40MHz DIO mode, secure boot enabled
before = 1380ms
after = 934ms

(Secure boot involves two ECC signature verifications (partition table, app) that take approx 300ms each with 80MHz CPU.)
2017-07-19 18:31:59 +10:00
Ivan Grokhotkov
aef5e90cce Merge branch 'feature/mmap_unordered_flash_pages' into 'master'
Add function to map non-contiguous flash pages to contiguous memory space.

See merge request !873
2017-07-18 10:49:12 +08:00
Angus Gratton
99fe61716c startup: Add assertion checks around various initialisation sequences
These may fail if close to 192KB of static RAM is allocated (remaining early heap RAM is too small.)
2017-07-12 13:06:56 +08:00
Jeroen Domburg
93b7eaf5b2 esp_partition_mmap could map a page less than needed because it did not take the region offset into account. 2017-07-03 18:02:28 +08:00
Jeroen Domburg
113bb30218 This commit adds spi_flash_mmap_pages(), a function to map a set of unordered 64K pages in flash into a contiguous region in memory space. 2017-06-23 14:28:57 +08:00
Angus Gratton
11d2db40f4 spi_flash: Fix SPI flash write alignment/size bugs
* Writing >4 bytes to unaligned offsets would fail
* Writiing data from flash would fail (wrong buffer was used)
* Writing >8192 bytes from RAM would over-write data multiple times

Adds test cases for the above.
2017-06-09 17:33:27 +10:00
Tian Hao
26a3cb93c7 component/soc : move dport access header files to soc
1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
krzychb
1a19747678 Getting started guides 2017-04-27 19:51:42 +02:00
Ivan Grokhotkov
15ec487fde Merge branch 'feature/esp32_d2wd_support' into 'master'
ESP32-D2WD support

Support ESP32-D2WD with integrated flash in ESP-IDF.

Includes fix for https://github.com/espressif/esp-idf/issues /521


See merge request !639
2017-04-14 20:57:39 +08:00
Angus Gratton
85e76a7cfc spiflash ROM functions: Remove Quad I/O mode enable/disable code from flash ROM functions
Confusion here is that original ROM has two functions:

* SPIReadModeCnfig() - sets mode, calls enable_qio_mode/disable_qio_mode
* SPIMasterReadModeCnfig() - As above, but doesn't set QIO mode in status register

However we never want to use the ROM method to set/clear QIO mode flag, as not all flash chips work this way. Instead we
do it in flash_qio_mode.c in bootloader.

So in both cases (ROM or "patched ROM") we now call SPIMasterReadModeCnfig(), which is now named
esp_rom_spiflash_config_readmode().
2017-04-13 17:54:42 +10:00
Ivan Grokhotkov
af0ecca492 add test case for invalid cache access interrupt 2017-04-13 15:27:39 +08:00
Alexey Gerenkov
0860f46220 spi_flash: Fixed bug in SPI flash ROM driver to work with embedded flash chip
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
2017-04-11 10:51:19 +08:00
Ivan Grokhotkov
92436021ab spi_flash: fix race condition in s_flash_op_complete access
Flash operation complete flag was cleared by the core initiating flash
operation. If the other core was running an ISR, then IPC task could
be late to enter the loop to check s_flash_op_complete by the time next
flash operation started. If the flag is cleared on the CPU waiting on
this flag, then the race condition can not happen.
2017-03-28 01:34:17 +08:00