Commit Graph

19 Commits

Author SHA1 Message Date
Elbert van de Put
217d2d0775 example/modbus_master: fix the assert for uart_set_pin
Signed-off-by: aleks <aleks@espressif.com>

Closes https://github.com/espressif/esp-idf/pull/8607
2022-04-11 11:28:09 +00:00
aleks
f11e17f886 freemodbus: fix port enable disable sequence for tcp master and slave 2022-03-08 09:40:08 +01:00
Alex Lisitsyn
073da59d27 freemodbus: allow address gaps in master data dictionary (support of UID field in MBAP) (backport v4.3) 2022-02-18 05:40:49 +00:00
aleks
5b52358092 freemodbus: check/fix reinitialization issues (tcp master and slave examples) 2021-10-15 16:50:33 +08:00
aleks
0d0f4adbf8 freemodbus: fix mb zero based reg address in the iterator
Fixes https://github.com/espressif/esp-idf/issues/6571
2021-07-28 11:34:19 +02:00
Alex Lisitsyn
96b77a28b1 freemodbus: add support for list of area descriptors for each register area
add multi register area descriptors into concrete port (initial)
add create/destroy of area descriptors into concrete port
add  the list of descriptors in common slave interface structure and init/destroy in concrete slave port
move r/w callback functions into common slave
final update of common slave interface wrappers add override API option in concrete port
update slave examples to check new  feature
2021-01-28 12:29:32 +08:00
Fu Hanxi
0146f258d7 style: format python files with isort and double-quote-string-fixer 2021-01-26 10:49:01 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Alex Lisitsyn
8737584789 Bugfix/fix RS485 ut fail 2020-10-19 16:17:19 +08:00
Michael (XIAO Xufeng)
4941cf58d0 Revert "ci: temporarily disable RS485 related tests"
This reverts commit 983220e216
2020-09-04 12:57:08 +08:00
Alex Lisitsyn
d0b9829eef examples: freemodbus add tcp support for common master/slave iface
Add TCP port files to provide Modbus TCP interface for communication
Add freemodbus add tcp support for common master/slave iface and tcp example based on socket API
The communication between master and slave checked for each example serial_master, serial_slave (use ModbusPoll TCP)
update tcp example according netif changes, fix ci issues
update TCP slave implementation
update example_test.py to to set IP through stdin
update API documentation
event bit instead of semahore to lock communication resource
update default options and master/slave port files

Closes https://github.com/espressif/esp-idf/issues/858
Closes IDF-452
2020-07-22 00:34:04 +08:00
Ivan Grokhotkov
983220e216 ci: temporarily disable RS485 related tests 2020-07-06 20:12:43 +00:00
Alex Lisitsyn
3abdd2207d freemodbus: fix long buffer failure
check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
2020-03-30 22:05:48 +08:00
Alex Lisitsyn
16e6e63694 driver: fix driver set rx timeout feature of uart
tout_thr - move calculation and masking into hal layer update driver and uart_ll (add uart_ll_set_rx_tout)
move tout calculation into uart_ll
move calculation of time out in bit time for esp32s2 into low level uart_ll.h file
move uart_hal_get_symb_len() into hal
update set_rx_timeout() to warn user about incorrect value
update HAL, LL 1
fix uart_xx_set_rx_tout() to convert symbol time into bit time
update param description
update tout calculation in LL
update uart_hal_get_max_rx_timeout_thrd() and uart_ll_get_max_rx_timeout_thrd()
2020-03-27 16:20:21 +08:00
Alex Lisitsyn
ba1ee4092a freemodbus: fix merge issues 2019-12-10 14:30:25 +08:00
Alex Lisitsyn
44444208b7 freemodbus: update poll event processing
update modbus poll event loop processing to process multiple events
2019-12-10 14:27:09 +08:00
He Yin Ling
c906e2afee test: update example and unit tests with new import roles:
tiny_test_fw is a python package now. import it using normal way.
2019-12-07 10:34:54 +08:00
aleks
4f9742d90c freemodbus: fix supported targets ci issue 2019-11-26 09:07:47 +01:00
Alex Lisitsyn
67f62a79c1 freemodbus: add modbus master ascii
add support of modbus master ascii
rename base dir name of master and slave example to be mb_slave, mb_master to avoid conflict with sdio/slave example test
add Kconfig option to enable ASCII and RTU mode separately
update ASCII options + remove cast for errors
added baudrate for examples into Kconfig
updated magic numbers for timer timeout
put ascii private definitions into one file
2019-11-26 13:16:25 +08:00