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590 Commits

Author SHA1 Message Date
Mahavir Jain
384f7cd1da bootloader_support: consider signature sector in image length validation 
For secure boot enabled cases, bootloader and firmware images have signature
appended and size is variable based on scheme being used. This appended data
must be considered while verifying image length against allocated partition
size to avoid any possibilities of going beyond reserved size.

Closes IDF-5617
 2022-08-08 03:22:14 +00:00
jingli
ee3423834e kconfig: refactor xtal freq kconfig to common configuration item 2022-08-05 19:12:29 +08:00
Darian
c8ee369a7c Merge branch 'feature/deprecate-old-cpu-api' into 'master' 
HAL: Deprecate old CPU/SoC/Interrupt Controller HAL API

Closes IDF-4919 and IDF-5032

See merge request espressif/esp-idf!18987
 2022-07-23 00:37:33 +08:00
Cao Sen Miao
ec6a56ed0c spi_flash: re-enable the HPM mode on several XMC chips 2022-07-22 09:54:56 +08:00
Guillaume Souchere
0bac33ed41 esp_system: Remove deprecate section from esp_cpu.h 
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
 2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
 2022-07-22 00:06:06 +08:00
Jing Li
66395a5c00 system/sleep: further fix spi flash/ram current leakage 2022-07-21 19:14:26 +08:00
Jakob Hasse
33a3616635 refactor (bootloader_support, efuse)!: remove target-specific rom includes 
The following two functions in bootloader_support are private now:
* esp_secure_boot_verify_sbv2_signature_block()
* esp_secure_boot_verify_rsa_signature_block()
They have been moved into private header files
inside bootloader_private/

* Removed bootloader_reset_reason.h and
  bootloader_common_get_reset_reason() completely.
  Alternative in ROM component is available.

* made esp_efuse.h independent of target-specific rom header
 2022-07-13 10:29:02 +08:00
Song Ruo Jing
ea97cc93ea Merge branch 'feature/c2_systimer_26mhz' into 'master' 
esp32c2: 26 MHz XTAL support: Kconfig option, systimer support

Closes IDF-5412 and IDF-5413

See merge request espressif/esp-idf!18835
 2022-07-11 16:17:25 +08:00
Marius Vikhammer
6cc871d793 Merge branch 'feature/ulp_riscv_adc' into 'master' 
ulp-riscv: add support for using ADC as well as an example show-casing it.

Closes IDFGH-7564 and IDF-1714

See merge request espressif/esp-idf!18767
 2022-07-11 12:30:31 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
 2022-07-11 12:24:58 +08:00
Marius Vikhammer
e8b5096f52 ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-07-11 09:31:22 +08:00
Ivan Grokhotkov
f0f9890096 bootloader: set the initial XTAL frequency based on the Kconfig option 2022-07-08 15:04:26 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
7e42038c86 Merge branch 'refactor/move_regi2c_headers' into 'master' 
Refactor: move regi2c_*.h header files from esp_hw_support to soc component

See merge request espressif/esp-idf!18676
 2022-07-04 11:32:30 +08:00
Cao Sen Miao
a690a87829 spi_flash: Remove legacy spi_flash drivers 2022-07-01 11:01:34 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation 
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
 2022-06-20 11:34:20 +00:00
Konstantin Kondrashov
7f109b8181 Merge branch 'bugfix/adds_iram_attr_for_efuse_apis' into 'master' 
bootloader_efuse: Adds IRAM_ATTR for efuse API

Closes IDFGH-7601

See merge request espressif/esp-idf!18517
 2022-06-17 13:24:41 +08:00
KonstantinKondrashov
c4bdcf3207 bootloader_efuse: Adds IRAM_ATTR for efuse API 
Fixes startup of app for case:
bootloader with 40Mhz and app with 80Mhz (ESPTOOLPY_FLASHFREQ)

Closes https://github.com/espressif/esp-idf/issues/9156
 2022-06-15 15:48:41 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master' 
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
 2022-06-14 21:11:30 +08:00
Michael (XIAO Xufeng)
7b8e5888ca Merge branch 'refactor/add_clk_tree_ll' into 'master' 
clk_tree: Stage3 - HAL for clock subsystem

Closes IDF-4334

See merge request espressif/esp-idf!18270
 2022-06-14 17:16:29 +08:00
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls 
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
 2022-06-14 14:40:03 +08:00
Konstantin Kondrashov
7d942e0a5d Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master' 
reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0

Closes IDF-3702

See merge request espressif/esp-idf!14742
 2022-06-13 21:26:13 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
KonstantinKondrashov
46f0313d6b reset_reasons: EFUSE_RST is treated as POWERON_RST 
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
 2022-06-09 17:49:03 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Sachin Parekh
8ad3f2ba57 esp32c2: Add support for RNG 2022-06-02 11:36:23 +08:00
KonstantinKondrashov
dd4642b6ba secure_boot(esp32c2): Fix case when SB key is pre-loaded 2022-05-31 11:12:21 +00:00
KonstantinKondrashov
505e18237a bootloader: Support Flash Encryption for ESP32-C2 2022-05-31 11:12:21 +00:00
Anton Maklakov
5751ecbbe9 Merge branch 'bugfix/bootloader_warnings' into 'master' 
bootloader:  minor fixes of warnings

See merge request espressif/esp-idf!18307
 2022-05-31 13:36:01 +08:00
Jiang Jiang Jian
2bc5d58807 Merge branch 'feature/support_sleep_for_esp32c2' into 'master' 
esp32c2: support power management

Closes IDF-4440 and IDF-4617

See merge request espressif/esp-idf!18174
 2022-05-30 17:57:18 +08:00
Anton Maklakov
77c3bb9cfe bootloader: suppress -Wstringop-overflow 2022-05-30 11:45:33 +07:00
Anton Maklakov
aeaebc0977 bootloader: explicit initialization 2022-05-30 11:45:33 +07:00
Wu Zheng Hui
b98622c624 efuse: update efuse name 2022-05-28 22:03:16 +08:00
jingli
ae127b04cd fix ld err since esp32c2 do not suport config gpio of spi flash via efuse 2022-05-27 19:29:38 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
Sachin Parekh
7dd62bb044
esp32c2: Remove assert check on len for SHA calculation 2022-05-11 18:00:07 +05:30
Sachin Parekh
2c725264f7
esp32c2: Support Secure Boot V2 based on ECDSA scheme 2022-05-11 18:00:03 +05:30
Gustavo Henrique Nihei
8ffb157791 bootloader: Create option for enabling memory region protection 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-03 09:58:25 -03:00
Cao Sen Miao
4418a855ba spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2 2022-04-26 15:22:37 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component. 
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
 2022-04-21 12:09:43 +08:00
Armando
c4bcf1117c esp_hw_support: move soc_memory_types.h helper functions into esp_hw_support 2022-04-08 11:46:10 +08:00
Omar Chebib
9380fd6bee G0: remove components/esp32* dependency on efuse component 2022-03-30 11:40:37 +08:00
morris
de662b987e driver: fix issue found by coverity scan 2022-03-24 21:36:03 +08:00
Marius Vikhammer
453516fbbe Merge branch 'bugfix/replace_deprecated_options' into 'master' 
kconfig: replace deprecated options with new values

See merge request espressif/esp-idf!17494
 2022-03-16 09:32:55 +08:00
Marius Vikhammer
ca3c056ac9 kconfig: replace deprecated options with new values 2022-03-15 16:28:53 +08:00
Rahul Tank
f376bb5d05 Add support in Nimble for ESP32H2 2022-03-14 11:57:53 +05:30
Michael (XIAO Xufeng)
aab535fe4a Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master' 
hw_support: fixed regi2c not protected by lock on ESP32S2

See merge request espressif/esp-idf!16653
 2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580 hw_support: fixed regi2c not protected by lock on ESP32S2 2022-03-13 00:24:08 +08:00
Armando
c1cbd7bbf6 cache/mmu: implememnt cache and mmu hal APIs in bootloader 2022-03-11 22:43:11 +08:00
Sudeep Mohanty
a9fda54d39 esp_hw_support/esp_system: Re-evaluate header inclusions and include directories 
This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
 2022-03-07 11:18:08 +05:30
Armando
e66f59ae0b rng: fix rng adc digital inpu not disabled issue 2022-03-04 03:49:33 +00:00
Aditya Patwardhan
3b71bd7326 mbedtls-3.0: Fixed ESP32 build issues 
- Added MBEDLTS_PRIVATE(...) wherever necessary
- For functions like mbedtls_pk_parse_key(...), it is necessary to pass the RNG function
  pointers as parameter. Solved for dependent components: wpa_supplicant & openSSL
- For libcoap, the SSLv2 ClientHello handshake method has been deprecated, need to handle this.
  Currently, corresponding snippet has been commented.
- Examples tested: hello-world | https_request | wifi_prov_mgr

mbedtls-3.0: Fixed ESP32-C3 & ESP32-S3 build issues
- Removed MBEDTLS_DEPRECATED_REMOVED macro from sha1 port
- DS peripheral: esp_ds_rsa_sign -> removed unsused 'mode' argument
- Added MBEDTLS_PRIVATE(...) wherever required

mbedtls-3.0: Fixed ESP32-S2 build issues
- Fixed outdated function prototypes and usage in mbedlts/port/aes/esp_aes_gcm.c due to changes in GCM module

mbedtls-3.0: Fixed ESP32-H2 build issues

ci: Fixing build stage
- Added MBEDTLS_PRIVATE(...) wherever required
- Added RNG function parameter
- Updated GCM Module changes
- Updated Copyright notices

- Tests:
- build_esp_idf_tests_cmake_esp32
- build_esp_idf_tests_cmake_esp32s2
- build_esp_idf_tests_cmake_esp32c3
- build_esp_idf_tests_cmake_esp32s3

ci: Fixing build stage (mbedtls-related changes)
- Added MBEDTLS_PRIVATE(...) wherever required
- Updated SHAXXX functions
- Updated esp_config according to mbedtls changes

- Tests:
- build_examples_cmake_esp32
- build_examples_cmake_esp32s2
- build_examples_cmake_esp32c3
- build_examples_cmake_esp32s3

ci: Fixing build stage (example-related changes)
- Added MBEDTLS_PRIVATE(...) wherever required
- Updated SHAXXX functions
- Updated esp_config according to mbedtls changes

- Tests:
- build_examples_cmake_esp32
- build_examples_cmake_esp32s2
- build_examples_cmake_esp32c3
- build_examples_cmake_esp32s3

ci: Fixing target_test stage
- Updated test SSL version to TLS_v1_2

- Tests:
- example_test_protocols 1/2

ci: Fixing build stage
- Added checks for MBEDTLS_DHM_C (disabled by default)
- Updated esp_cryptoauthlib submodule
- Updated factory partition size for legacy BLE provisioning example

- Tests:
- build_examples_cmake_esp32
- build_examples_cmake_esp32s2
- build_examples_cmake_esp32c3
- build_examples_cmake_esp32s3

Co-authored-by: Laukik Hase <laukik.hase@espressif.com>
 2022-03-03 01:37:10 +05:30
Aditya Patwardhan
45122533e0 mbedtls-3 update: 
1) Fix build issue in mbedtls
2) skip the public headers check in IDF
3)Update Kconfig Macros
4)Remove deprecated config options
5) Update the sha API according to new nomenclature
6) Update mbedtls_rsa_init usage
7) Include mbedtls/build_info.h instead of mbedtls/config.h
8) Dont include check_config.h
9) Add additional error message in esp_blufi_api.h
 2022-03-03 01:37:10 +05:30
Michael (XIAO Xufeng)
78165c541e Merge branch 'bugfix/bootloader_uart_custom_gpio' into 'master' 
bootloader: fixed the issue custom_uart_gpio doesn't take effect

Closes IDF-4606

See merge request espressif/esp-idf!16910
 2022-03-02 02:35:14 +08:00
Michael (XIAO Xufeng)
395cd494f8 bootloader: fixed the issue custom_uart_gpio doesn't take effect 2022-03-01 17:54:34 +08:00
KonstantinKondrashov
9605f3eb1a soc: Adds efuse hal 
Replaced eFuse ROM funcs with hal layer
 2022-02-24 22:20:09 +08:00
rudi ;-)
f242a1705a
add support for Flash 32MB..128MB (S2, S3) 
ESP32-S2 and ESP32-S3
supports up to 1 GB of external flash and RAM
add support for
-    32MB
-    64MB
-    128MB ( example NOR spiFLASH 1G-BIT W25Q01JVZEIQ Winbond 0xEF 0x40 0x21 )

Merges https://github.com/espressif/esp-idf/pull/7688

Signed-off-by: Ivan Grokhotkov <ivan@espressif.com>
 2022-02-21 10:26:41 +03:00
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
Mahavir Jain
68f67db984 Merge branch 'feature/efuse_esp8684' into 'master' 
efuse(esp32c2): Support eFuse key APIs

Closes IDF-3818

See merge request espressif/esp-idf!16290
 2022-02-01 11:30:00 +00:00
KonstantinKondrashov
ebdc52d4e2 efuse(esp32c2): Support eFuse key APIs 2022-02-01 17:30:31 +08:00
KonstantinKondrashov
f761cee32e bootloader_support: Removes old code of SB and FE for esp32h2 2022-01-26 15:21:20 +08:00
KonstantinKondrashov
3a23340e40 bootloader_support: Support eFuse key APIs in SB and FE 2022-01-25 20:25:39 +08:00
KonstantinKondrashov
4eef5fd36f bootloader: Fixes bootloader_common_get_sha256_of_partition. Adds hash check. 
Closes https://github.com/espressif/esp-idf/issues/8274
 2022-01-25 02:16:18 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
chenjianxing
7a9947f3c6 esp_phy: Update ESP32S2 phy lib to support eco1 chip 2022-01-07 19:59:41 +08:00
Cao Sen Miao
d397464fc4 spi_flash: refactor spi_flash.h to esp_rom_spiflash.h but keep the content in spi_flash.h 2021-12-30 14:12:31 +08:00
Cao Sen Miao
b0decda1e3 bootloader: move bootloader flash support to isolate folders 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18 spi_flash: refactor spi_flash.h to decline duplicated code 2021-12-30 14:05:12 +08:00
Sudeep Mohanty
6a2a6e4220 Merge branch 'feature/remove-depricated-cpu-util-functions' into 'master' 
esp_hw_support: Removed deprecated CPU util functions

Closes IDF-2868

See merge request espressif/esp-idf!16391
 2021-12-29 16:44:17 +00:00
morris
1f06c1bd1b Merge branch 'feature/fast_gpio_esp32c2' into 'master' 
fast gpio support on esp32c2/esp8684

See merge request espressif/esp-idf!16531
 2021-12-29 07:01:41 +00:00
Sudeep Mohanty
e22b4007d3 esp_hw_support: Removed deprecated CPU util functions 
The following files were deleted:
- components/esp_hw_support/include/soc/cpu.h
- components/soc/esp32s3/include/soc/cpu.h

The following functions are deprecated:
- get_sp()

The following functions declared in soc/cpu.h are now moved to esp_cpu.h:
- esp_cpu_configure_region_protection()

The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h:
- esp_cpu_process_stack_pc()

All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2021-12-28 16:58:37 +05:30
morris
1a9dbf9e2f bootloader: print MMU info after 2nd bootloader banner 2021-12-28 10:12:57 +08:00
Jakob Hasse
64a355eba8 feat (bootloader): added rng sampling 
Set maximum RNG query frequency to save value known from tests
 2021-12-27 13:59:20 +08:00
Michael (XIAO Xufeng)
9894019909 bootloader: support unlock MXIC flash chips 2021-12-20 18:01:12 +08:00
Cao Sen Miao
56edc81b5d spi_flash: add support for th 1M flash 2021-12-13 11:47:48 +08:00
Mahavir Jain
5cdd3999c7 bootloader_support: fix Coverity scan warning 
Null pointer dereferences  (REVERSE_INULL) :

Null-checking "part" suggests that it may be null, but it has already been dereferenced on all paths leading to the check.
 2021-12-07 09:49:12 +05:30
Gustavo Henrique Nihei
d0846e48e5 Merge branch 'bugfix/bootloader_utility_warnings' into 'master' 
bootloader_support: Fix compiler warnings

See merge request espressif/esp-idf!16083
 2021-11-26 04:13:37 +00:00
Michael (XIAO Xufeng)
c4310fb0db Merge branch 'feature/add_h2_beta2_target_support' into 'master' 
esp32h2: Add support for esp32h2 beta2 version

Closes IDF-4230

See merge request espressif/esp-idf!15630
 2021-11-26 03:56:01 +00:00
Gustavo Henrique Nihei
c6391f12db bootloader_support: Fix unused-but-set-variable compiler warning 
When building with BOOTLOADER_LOG_LEVEL lesser then VERBOSE, an error
code variable was being set but not consumed, resulting in a compiler
warning.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-25 21:12:52 +08:00
Gustavo Henrique Nihei
acbf871d2f bootloader_support: Fix unused-variable compiler warning 
Builds for every chip other than ESP32 resulted in a compiler warning
due to "drom_load_addr_aligned" and "irom_load_addr_aligned" not being
used, besides being possible to actually reuse them.
Furthermore, extended the logic for the other similar variables.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-25 21:12:52 +08:00
laokaiyao
f21020ce04 esp32h2: update reg and struct for beta2 2021-11-24 12:34:17 +08:00
Mahavir Jain
9cecde6fb4 bootloader: add anti-FI checks around secure version in anti-rollback scheme 2021-11-24 11:37:27 +08:00
Anton Maklakov
05d2c540a4 Merge branch 'fix/virt_efuse_example_test' into 'master' 
efuse_example_test: Fix the example test

See merge request espressif/esp-idf!16065
 2021-11-24 01:12:00 +00:00
Gustavo Henrique Nihei
0a15a3fa96 Merge branch 'bugfix/bootloader_debug_buffers' into 'master' 
bootloader_support: Fix and re-enable bootloader_debug_buffer function

See merge request espressif/esp-idf!15998
 2021-11-23 11:54:42 +00:00
Aditya Patwardhan
5d61eea847 efuse_example_test: Fix the example test ( broken due to latest change 
in info message)

*Unify the log messages when UART ROM Download mode is kept enabled
 2021-11-23 15:21:32 +05:30
Gustavo Henrique Nihei
f75f74ac40 bootloader_support: Fix and re-enable bootloader_debug_buffer function 
The body of the bootloader_debug_buffer function was conditioned to
macros that were never defined, resulting in deactivated code.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-22 12:13:58 -03:00
Aditya Patwardhan
be65338212 secure_boot: Fix warning when UART ROM DL mode is disabled 
*Additionally use updated calls to enable rom secure download mode
 2021-11-22 12:01:15 +05:30
Cao Sen Miao
981abed2b2 spi_flash: refact that flash qio can be overidable 2021-11-11 12:28:21 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private 
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
 2021-11-08 10:37:47 +08:00
Cao Sen Miao
bf6fa70812 ESP8684: update bootloader, bootloader_support, esp_rom 2021-11-06 17:33:44 +08:00
Ivan Grokhotkov
0b376251df Merge branch 'feature/kconfig_for_reproducible_build' into 'master' 
Feature: kconfig for reproducible build

See merge request espressif/esp-idf!15100
 2021-11-04 22:07:29 +00:00
Mahavir Jain
2a885ae694 secure_boot_v2: fix issue in pre-flashed digest (manual) workflow 
This commit fixes issue where empty (unprogrammed) digest slot out of
multiple supported (e.g. 3 for ESP32-C3) could cause issue in
workflow enablement process.

Notes:

1. This issue was applicable for chips supporting "secure-boot-v2"
scheme with multiple digests slots
2. This issue was affecting only manual workflow, where digest of
public was pre-flashed in efuse
3. Change in "flash_encrypt.c" is only for additional safety purpose
 2021-11-02 15:26:24 +08:00
Fu Hanxi
9919b75ec1 build: add CONFIG_APP_REPRODUCIBLE_BUILD menuconfig option to produce reproducible binaries 2021-10-26 10:43:15 +08:00
Sachin Parekh
724fdbc9f1 secure_boot: Do not allow key revocation in bootloader 2021-10-22 12:20:14 +05:30
Wu Zheng Hui
001c29b077 bootloader: Simplify multi-chip control logic of the cache 2021-10-21 18:09:37 +08:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection 
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
 2021-09-02 12:25:12 +05:30
Yuriy Shestakov
87b958c814 Fixed GLITCH_RTC_RST for esp32-c3 revision 3 
* Issue: https://github.com/espressif/esp-idf/issues/7082

Signed-off-by: Yuriy Shestakov <yshestakov@gmail.com>

Closes https://github.com/espressif/esp-idf/issues/7082
Closes https://github.com/espressif/esp-idf/pull/7441
 2021-09-02 12:25:12 +05:30
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Armando (Dou Yiwen)
3e172289b0 Merge branch 'feature/support_octal_flash_120m_str_mode_on_esp32s3' into 'master' 
mspi: support octal flash 120MHz STR mode on esp32s3

Closes IDF-3146

See merge request espressif/esp-idf!14668
 2021-08-20 08:40:02 +00:00
Mahavir Jain
85e1258178 Merge branch 'esp32s3/secure_boot' into 'master' 
bootloader: Enable Secure boot V2 for ESP32-S3

Closes IDF-1787

See merge request espressif/esp-idf!14873
 2021-08-20 06:44:19 +00:00
Michael (XIAO Xufeng)
7649db9712 draft: another patch.. 2021-08-19 17:02:58 +08:00
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Michael (XIAO Xufeng)
8dcfa1b384 spi_flash: fix the corruption of ROM after calling bootloader_execute_flash_command 
The user register, especially dummy related ones, needs to be restored, otherwise the ROM function will not work.

Introduced in dd40123129.
 2021-08-18 23:55:39 +08:00
Mahavir Jain
012c9e26a4 Merge branch 'fixes/secure_boot' into 'master' 
secure_boot/esp32(s2,c3): Disable read protecting of efuses

See merge request espressif/esp-idf!14769
 2021-08-17 05:05:00 +00:00
Michael (XIAO Xufeng)
a0d2efe1be Merge branch 'bugfix/xmc_overerase' into 'master' 
bootloader: add xmc spi_flash startup flow to improve reliability

See merge request espressif/esp-idf!13895
 2021-08-13 15:27:48 +00:00
Sachin Parekh
f430e86c0f secure_boot/esp32(s2,c3): Disable read protecting of efuses 
When secure boot is enabled, disable the ability to read protect
efuses that contain the digest.
 2021-08-13 13:41:59 +05:30
Michael (XIAO Xufeng)
dd40123129 bootloader: add xmc spi_flash startup flow to improve reliability 2021-08-12 17:22:42 +08:00
KonstantinKondrashov
3cf4fbc150 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-06 13:14:54 +08:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible 
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
 2021-08-04 12:48:30 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
KonstantinKondrashov
92448e7bd7 secure_boot: Whole 3 bits are set for SOFT_DIS_JTAG eFuse 2021-07-21 17:19:01 +05:00
Marius Vikhammer
03545feaea Merge branch 'feature/s3_flash_enc' into 'master' 
S3 Flash encryption bringup

Closes IDF-1786 and IDF-2576

See merge request espressif/esp-idf!14259
 2021-07-19 08:56:50 +00:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master' 
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
 2021-07-19 06:23:19 +00:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image 
Includes fix for detecting ESP32 ECO3 on FPGA
 2021-07-16 10:50:06 +10:00
Angus Gratton
192b5925da bootloader: Can boot to IDF scheduler start on internal-use FPGA 
On ESP32 & ESP32-S2. Patch doesn't include changes to make the app run fully.
 2021-07-16 10:50:06 +10:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
Marius Vikhammer
b8a322195e flash encryption: add flash encryption support for ESP32-S3 2021-07-14 18:46:17 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace 
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
 2021-07-13 15:42:40 +08:00
morris
3e2d98500f Merge branch 'refactor/common_rom_rtc_apis' into 'master' 
soc: define reset reasons in soc component

Closes IDF-1993

See merge request espressif/esp-idf!9829
 2021-07-13 07:05:25 +00:00
Angus Gratton
d7d28786b2 Merge branch 'bugfix/secure_boot_sig_verify' into 'master' 
secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification

See merge request espressif/esp-idf!14300
 2021-07-13 06:48:25 +00:00
Angus Gratton
4fe4df8770 Merge branch 'feature/bootloader_pin_level_pr7089' into 'master' 
bootloader: Add configurable pin level for factory reset (PR)

Closes IDFGH-5337

See merge request espressif/esp-idf!13956
 2021-07-13 05:39:25 +00:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Angus Gratton
e3ca61a200 secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification 
Increase the test app optimization level to one that would find this issue.
 2021-07-08 19:17:04 +10:00
Marius Vikhammer
71c1da8952 timer group: add timer group and WDT support for ESP32S3 
Regenerate timer group header files and update LL, check examples
and update docs.
 2021-07-06 16:21:43 +08:00
Angus Gratton
6bbb58c8c2 bootloader: Small cleanup and docs for factory reset level config 
- Add to docs & config descriptions
- Change to a "choice" to become self-documenting
- Keep the bootloader_common_check_long_hold_gpio() function for compatibility
 2021-07-05 12:08:36 +08:00
chegewara
fb7234a13d bootloader: Add selectable level for factory reset pin 
Closes https://github.com/espressif/esp-idf/pull/7089
 2021-07-05 12:08:36 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master' 
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
 2021-06-28 01:59:19 +00:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Cao Sen Miao
f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
KonstantinKondrashov
57c7ebc4bc flash_encrypt: Adds API to switch flash encryption "Development" to "Release" 2021-06-17 12:58:04 +05:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
 2021-06-17 07:21:36 +08:00
Angus Gratton
6961e4b3d5 Merge branch 'bugfix/ulp_overflow_rtc_mem' into 'master' 
ulp: ULP_COPROC_RESERVE_MEM limitation

See merge request espressif/esp-idf!13814
 2021-06-08 07:20:46 +00:00
Angus Gratton
0f1b24891b Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master' 
bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip

Closes IDFGH-4353

See merge request espressif/esp-idf!13111
 2021-06-07 04:50:54 +00:00
Marius Vikhammer
2f705136e9 bootloader: fix verify_load_addresses wrongly reporting "bad load address range" 
verify_load_addresses would check if load_end was in a certain member range,
but should verify (load_end - 1) which is the actual last byte.
 2021-06-04 12:15:52 +08:00
Jan Brudný
dffe49f305 bootloader: update copyright notice 2021-06-02 14:22:09 +02:00
Angus Gratton
f486736cbf bootloader: Fix "skip validate in deep sleep" on ESP32 & ESP32-S2 
Regression in 83bf2e1ac1, this memory region was shifted from fast to slow RTC
memory (no change on ESP32-C3 as no RTC fast memory on this chip.)
 2021-06-01 18:58:55 +10:00
KonstantinKondrashov
071e00a088 bootloader: Fix a wrong offset in image_load after refactoring 2021-05-26 18:06:11 +08:00
Angus Gratton
e886aa1da4 Merge branch 'update_copyright_notice_bootloader_support' into 'master' 
bootloader: update copyright notice, part 2

See merge request espressif/esp-idf!13495
 2021-05-19 00:26:35 +00:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app 
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
 2021-05-18 01:32:59 +00:00
Cao Sen Miao
8c5819dccb usb_serial_jtag: fix the bug that cannot write with usb_jtag 2021-05-13 13:40:01 +08:00