Commit Graph

10 Commits

Author SHA1 Message Date
Erhan Kurubas
55261747fc ci(panic): add coredump tcb corrupted test 2024-05-27 13:55:14 +02:00
Erhan Kurubas
94fc3630f5 ci(panic): add flash encrypted coredump tests 2024-05-06 15:54:33 +02:00
Konstantin Kondrashov
8b418d4b09 feat(esp_system): Print backtrace for both CPUs when cache error does not determine CPU 2024-04-30 15:20:58 +03:00
Erhan Kurubas
3b8191cf5d feat(coredump): save .bss, .data and .heap sections to the elf file 2024-04-23 19:07:51 +03:00
Alexey Lapshin
6f2de1fb23 fix(system): esp32p4: fix mepc when load/store failure occurred 2024-04-18 19:49:19 +04:00
Alexey Lapshin
cb82161dae feat(system): esp32p4: support panic tests 2024-03-21 15:36:36 +04:00
Marius Vikhammer
297607587b test(panic): remove WDT both CPU test
Test never worked on S3/P4 and was flakey on ESP32. Hard to design a reliable test
case that triggers both WDT at the exact same time.
2024-01-23 11:55:18 +08:00
Laukik Hase
3f67722274
refactor(tools/test_apps): Move HAL tests for MPU to the panic test-app 2023-10-13 10:16:57 +05:30
Alexey Lapshin
4df3ff619e feat(esp_system): implement hw stack guard for riscv chips
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
2023-07-01 16:27:40 +00:00
Laukik Hase
fa27795048
test_app: Split panic test app into separate source files
- Added minor improvements to  `panic` test app
  * Replaced existing API to disable flash cache which did not disabled cache always
    (`esp_flash_default_chip->os_func->start(esp_flash_default_chip->os_func_data)`)
    with `spi_flash_enable_interrupts_caches_and_other_cpu`
  * Included some required headers explicitly (`esp_memory_utils.h` and `esp_heap_caps.h`)
2023-02-16 15:26:47 +05:30