In previous gpio default isr, interrupt status bits get cleared at the exit of the isr.
However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost.
Closes https://github.com/espressif/esp-idf/pull/6853
uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL
Closes IDF-5424 and IDF-4332
See merge request espressif/esp-idf!19274
There are two ways to know which transaction descriptor is finished,
by either calling `spi_device_get_trans_result`, or getting it from `post_cb`.
When `SPI_DEVICE_NO_RETURN_RESULT` is set, driver will not push finished
transaction descriptors into the queue. So you can't get it from
`spi_device_get_trans_result`. The only way to know this is via `post_cb`.
update document for function `spi_bus_add_device`
Add this flag to select if returning done transaction descriptors from ISR.
You should get the finished transaction descriptor by the callback "post_cb"
if you using this flag, if not, same as the past.
Close https://github.com/espressif/esp-idf/pull/9141
Closes: https://github.com/espressif/esp-idf/issues/9208
When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.
- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
sdmmc, sdspi: fixes related to status checks, R1b response support, erase fix for SPI mode, fix for erase timeout calculation
Closes IDF-4728
See merge request espressif/esp-idf!17727
Previous version of the code used a fixed constant (500 ms) for the
erase timeout and added 1 ms for each sector erased.
This commit improves timeouts calculation:
- For SD cards, check if erase timeout information is present in the
SSR register. If yes, use it for erase timeout calculation.
Otherwise assume 250ms per erase block, same as Linux does.
- For eMMC assume 250ms per erase block (but no less than 1 second).
This has to be improved later to use the erase timeout info in the
extended CSD register.
