6 Commits

Author	SHA1	Message	Date
Marius Vikhammer	5036ec363b	soc: add dummy bytes to ensure instr prefetch always valid ... The CPU might prefetch instructions, which means it in some cases will try to fetch instruction located after the last instruction in flash.text. Add dummy bytes to ensure fetching these wont result in an error, e.g. MMU exceptions	2021-04-01 10:23:44 +08:00
Ivan Grokhotkov	9a20283485	Merge branch 'bugfix/scan_test_missing_build_apps_without_tests' into 'master' ... ci: bugfix: scan_test missing build apps without tests See merge request espressif/esp-idf!12138	2021-01-28 17:48:24 +08:00
Martin Vychodil	69096ddce5	Security: ESP32C3 memory protection feature (IRAM0/DRAM0) ... Software support for PMS module. Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W) On/locked by default, configurable in Kconfig (esp_system) Closes https://jira.espressif.com:8443/browse/IDF-2092	2021-01-27 08:44:03 +01:00
Fu Hanxi	e4e375f488	fix: add spi_flash.h for s2, s3, c3 targets in cpu_start.c ... update s2, s3, c3 ld files spi_flash_attach to esp_rom_spiflash_attach	2021-01-27 12:35:49 +08:00
Jakob Hasse	ed42758549	[cxx/system]: fix init_priority ordering on RISCV ... * C++ init_priority attributes work now on RISCV * Add debug output for init_array functions Closes IDF-2206 Closes https://github.com/espressif/esp-idf/issues/6351	2021-01-07 16:04:17 +08:00
morris	8330b2541a	esp32c3: added target component	2020-12-11 11:44:01 +08:00