Increase the interrupt reassert level timing so the chances of missing
two consecutive events are minimal.
Enable only SIR_RECV interrupt event, so the SEND events are not used
for GPIO signal.
If the GPIO interrupt is re-asserted too quickly it could be missed. If this happens the driver goes silent and never receives any data. Recover by periodic checks of the IO signal level
The issue typically happens for link-down during Tx. Added two retry levels, one before checking the sanity of the w5500 phy register and another for the Tx done itself (if the device is in the sane state)
Closes https://github.com/espressif/esp-idf/issues/6233
Reading SPI data may come in 4-byte units and thus result in unwanted
overwrites if smaller size registers read, especially if multiple placed
one after another. Fixed by using direct reads to `trans` structure for
sizes smaller or equal to 4.
Closes https://github.com/espressif/esp-idf/issues/6579
W5500 features an Ethernet MAC+PHY, plus a HW SOCKET implementation.
But in IDF, we only use software TCP/IP stack, which means we have
to bypass the HW TCP/IP stack in W5500.
So we enables the MAC RAW mode in W5500.
