Add four check maros:
* ESP_RETURN_ON_ERROR()
* ESP_GOTO_ON_ERROR()
* ESP_RETURN_ON_FALSE()
* ESP_GOTO_ON_FALSE()
Also add a `xx_ISR` version for each of them, which can be used in ISR.
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc