Commit Graph

943 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
49a48644e4 spi: allow using esp_flash and spi_master driver on the same bus 2020-03-26 22:08:26 +08:00
Michael (XIAO Xufeng)
f3bf9c5ae0 hal: put rodata into dram for hal functions 2020-03-26 22:08:25 +08:00
Michael (XIAO Xufeng)
296d095e53 Merge branch 'bugfix/remove_dependency_in_timergroup_caps' into 'master'
remove dependency of timer_group_caps.h on soc.h

See merge request espressif/esp-idf!8116
2020-03-26 18:18:45 +08:00
Ivan Grokhotkov
7f18576e23 Merge branch 'bugfix/inline_get_cpu_id_hal_func' into 'master'
soc: put hal function to get core id in IRAM

See merge request espressif/esp-idf!8107
2020-03-26 18:14:51 +08:00
morris
0c6e1b9482 remove dependency of timer_group_caps.h on soc.h 2020-03-26 17:15:19 +08:00
Angus Gratton
928fc0016c Merge branch 'bugfix/doc_soc_caps_file_path' into 'master'
doc: correct soc caps file path

See merge request espressif/esp-idf!8097
2020-03-26 10:32:12 +08:00
Michael (XIAO Xufeng)
826cc7ecb6 Merge branch 'feature/bringup_723_cmake_rmt_driver_update' into 'master'
RMT new features in ESP32S2

Closes IDF-1286

See merge request espressif/esp-idf!7401
2020-03-26 10:24:18 +08:00
Michael (XIAO Xufeng)
661f4c430d Merge branch 'feature/esp32s2_i2c_driver' into 'master'
Feature:  Add esp32-s2 I2C driver.

Closes IDF-1278 and IDF-1026

See merge request espressif/esp-idf!7680
2020-03-26 10:20:40 +08:00
Michael (XIAO Xufeng)
42c552242b Merge branch 'feature/fix_touch_driver_for_esp32s2' into 'master'
driver(touch): fix touch sensor driver for esp32s2

See merge request espressif/esp-idf!7664
2020-03-26 09:50:42 +08:00
Darian Leung
91841a53ff WDT: Add LL and HAL for watchdog timers
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:

- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
  in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
  startup code to use the HAL layer.
2020-03-26 02:14:02 +08:00
fuzhibo
340563f479 Driver(touch): fix touch sensor driver for esp32s2.
1.update touch sensor driver for esp32s2;
2.update unit test for touch sensor;
3.update register files about touch sensor;
2020-03-25 22:45:57 +08:00
morris
4fc16e2374 rmt: prefix caps name with SOC_ 2020-03-25 17:14:00 +08:00
morris
dc91aa9786 rmt: support tx in a group 2020-03-25 17:13:59 +08:00
morris
c91565d538 rmt: update rmt ll APIs 2020-03-25 13:19:03 +08:00
chenjianqiang
ecbe0dad1b driver/rmt: new features on esp32s2
1. add receive carrier remove function
2. add pingpong receive function
2020-03-25 13:19:03 +08:00
Renz Bagaporo
d5085010c8 soc: put hal function to get core id in IRAM 2020-03-24 22:50:51 +08:00
morris
3cf8479017 doc: always adopt latest chip revision 2020-03-24 19:11:28 +08:00
Renz Bagaporo
3d0967a58a test: declare requirements and include dirs private 2020-03-23 10:58:50 +08:00
Angus Gratton
207914a13a Merge branch 'refactor/common_code_panic_handler' into 'master'
Panic handling common code refactor

See merge request espressif/esp-idf!7489
2020-03-19 11:23:57 +08:00
Angus Gratton
9c430a17aa Merge branch 'feature/mpi_accel_s2' into 'master'
MPI/RSA accelerator bringup for S2 and bignum refactor

Closes IDF-803 and IDF-1174

See merge request espressif/esp-idf!7915
2020-03-17 13:16:05 +08:00
David Cermak
ecb419da2f soc: minor header fix typo and include of sdkconfig 2020-03-13 12:53:52 +01:00
Marius Vikhammer
e21bef3f28 mpi: active hw accel for S2
Actives MPI/RSA hardware acceleratio for ESP32 S2.

Closes IDF-803
2020-03-13 18:33:18 +08:00
Ivan Grokhotkov
64ceab0069 Merge branch 'feature/aes_sha_accel_s2' into 'master'
crypto: SHA and AES accelerator bring up for S2

Closes IDF-1443, IDF-714, and IDF-716

See merge request espressif/esp-idf!7825
2020-03-13 18:21:09 +08:00
michael
3b1fa7b8f0 spi_flash: add caps for dummy output control 2020-03-11 16:13:39 +00:00
Marius Vikhammer
37369a8a57 crypto: SHA and AES accelerator bring up for S2
Brings up, fixes and enables AES and SHA hardware acceleration.

Closes IDF-714
Closes IDF-716
2020-03-11 15:09:45 +08:00
Angus Gratton
59381b60c0 Merge branch 'refactor/hal_function_set_exception_vector_table' into 'master'
soc: add hal api to set exception vector table base address

See merge request espressif/esp-idf!7905
2020-03-11 14:44:42 +08:00
Renz Christian Bagaporo
84e80a3e50 soc: remove sdio slave hal source file duplicate 2020-03-10 19:56:24 +08:00
Renz Christian Bagaporo
2b100789b7 esp32, esp32s2: move panic handling code to new component 2020-03-10 19:56:24 +08:00
Michael (XIAO Xufeng)
81daaff050 Merge branch 'feature/usb_component' into 'master'
Feature/usb component

See merge request espressif/esp-idf!6897
2020-03-09 16:53:55 +08:00
Andrei Gramakov
9d059be165 usb: added a tinyusb component; ci; soc.
ci: ignore s2-only projects from the cmake-make test
soc: refactored the usb part
2020-03-09 07:55:06 +01:00
Angus Gratton
f21079a06d Merge branch 'bugfix/duplicate_sdio_slave_hal' into 'master'
soc: remove duplicate sdio_slave_hal.c

See merge request espressif/esp-idf!7874
2020-03-09 13:35:58 +08:00
morris
8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Angus Gratton
a9854f7085 Merge branch 'feature/rmt_clock_support_ref_tick' into 'master'
rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2

Closes IDFGH-1715

See merge request espressif/esp-idf!7614
2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng)
8e348dcdcd Merge branch 'bugfix/fix_driver_ut_i2s' into 'master'
bugfix(i2s): fix driver ut i2s

See merge request espressif/esp-idf!6946
2020-03-06 11:55:07 +08:00
Jiang Jiang Jian
b7a14c47e6 Merge branch 'bugfix/customer_baidu_psram_stack_backtrace' into 'master'
added psram stack check in backtrace

See merge request espressif/esp-idf!7834
2020-03-06 11:35:54 +08:00
Renz Bagaporo
5f3a689a89 soc: remove duplicate sdio_slave_hal.c 2020-03-05 12:47:54 +08:00
chaijie
66beaaef7d soc(rtc): modify rtc code in soc for esp32s2 2020-03-03 13:22:52 +00:00
morris
07088c6446 rmt: disable carrier feature by default 2020-03-03 20:14:46 +08:00
morris
0e4d82bc55 rmt: support REF_TICK as channel clock source
Closes https://github.com/espressif/esp-idf/pull/3952
2020-03-03 20:14:46 +08:00
morris
3c43264f83 rmt: add RMT_CHANNELS_NUM in rmt_caps.h 2020-03-03 20:14:45 +08:00
xiongyu
b3ae9fa978 bugfix(i2s): Updated ESP32-S2 ADC DAC support
* Delete the relevant codes of ADC DAC of ESP32-S2.
2020-03-03 12:59:30 +08:00
fuzhibo
3ad5138dd8 fix coexist i2s_adc and rtc_adc 2020-03-03 11:58:53 +08:00
xiongyu
faf898b659 bugfix(i2s): fix driver ut i2s
* Add test support for ESP32S2

* Add loop back test

* Support chip internal connection, no external wiring required.

* Delete the relevant codes of PDM of ESP32-S2 ll layer.

* fix dac dma mode issue
2020-03-03 11:58:53 +08:00
Li Shuai
c796e14964 added psram stack check in backtrace 2020-03-03 11:52:29 +08:00
Angus Gratton
04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master'
CPU related operations abstraction

See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Michael (XIAO Xufeng)
ce3ab0b8df Merge branch 'bugfix/nec_example' into 'master'
bugfix in NEC example and low level function

Closes IDFGH-2676 and IDFGH-2689

See merge request espressif/esp-idf!7562
2020-02-28 11:00:50 +08:00
Mahavir Jain
5f897fd33c Merge branch 'feat/secure_boot_v2_v41' into 'master'
feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3

Closes IDF-799

See merge request espressif/esp-idf!6778
2020-02-27 18:54:08 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng)
7f8c827326 Merge branch 'bugfix/fix_driver_ut_pcnt' into 'master'
bugfix(pcnt): fix driver ut pcnt

See merge request espressif/esp-idf!6891
2020-02-27 11:29:28 +08:00
Renz Christian Bagaporo
d46989efa3 soc: remove param checking in cpu related abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
f75cb2ef00 soc: change cpu stall, unstall, and reset core to not return values 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
d5c123c1f5 soc: use own macro to assert proper args for cpu abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
7f864d24ad soc: prefer assertions, disabling functions for cpu abstractions
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.

Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo
cefc71cdcd bootloader_support: mem-related initializations using cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Michael (XIAO Xufeng)
c53192d521 Merge branch 'bugfix/fix_uart_set_line_inverse_breaking_change_issue' into 'master'
Bugfix(uart): fix uart_set_line_inverse breaking change issue

Closes IDFGH-2469

See merge request espressif/esp-idf!7345
2020-02-26 18:34:52 +08:00
xiongyu
4d5c950770 bugfix(pcnt): fix driver ut pcnt
* Let `[ignore] case` return to freedom

  1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.

  2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.

* Add test support for ESP32S2

* Support chip internal connection, no external wiring required.
2020-02-26 16:52:53 +08:00
houwenxiang
4883733472 driver(I2C): support esp32-s2 I2C driver. 2020-02-25 21:56:00 +08:00
Michael (XIAO Xufeng)
8f496a0f96 Merge branch 'refactor/add_ll_for_clock_gate_operation' into 'master'
periph_ctrl: move target specific into ll files

See merge request espressif/esp-idf!7733
2020-02-25 16:56:30 +08:00
morris
e9717fc07b periph_ctrl: move target specific into ll files 2020-02-24 14:50:26 +08:00
morris
ea8d6318af add SOC_EMAC_SUPPORTED in soc_caps.h 2020-02-24 11:57:58 +08:00
houwenxiang
c07e4c775d driver(uart): fix uart_set_line_inverse breaking change issue
closes https://github.com/espressif/esp-idf/issues/4581
2020-02-24 11:36:31 +08:00
Fu Zhi Bo
7a5b67b8de rtcio: fix rtcio unhold function
Solve problems caused by code refactoring.

Closes https://github.com/espressif/esp-idf/issues/4600
2020-02-20 15:42:28 +08:00
Ivan Grokhotkov
40cff27053 Merge branch 'feature/esp32s2_pm' into 'master'
esp32s2: power management (DFS and auto light sleep)

Closes IDF-670, IDF-527, and IDFGH-231

See merge request espressif/esp-idf!7578
2020-02-19 18:26:33 +08:00
Ivan Grokhotkov
fe0df01b12 Merge branch 'bugfix/from_github' into 'master'
Fixes from Github

Closes IDFGH-2679, IDFGH-2632, IDFGH-2716, IDFGH-2439, and IDFGH-2509

See merge request espressif/esp-idf!7659
2020-02-18 23:53:38 +08:00
Alexander Borsuk
e489e48dfa Fixes compilation error on verbose level (IDFGH-2439)
Closes #4552

Merges https://github.com/espressif/esp-idf/pull/4786
2020-02-18 12:30:47 +01:00
Jiang Jiang Jian
1a7d0b3b6f Merge branch 'bugfix/esp32s2_rng' into 'master'
soc: esp32s2: fix address of WDEV_RND_REG

Closes IDF-1390

See merge request espressif/esp-idf!7640
2020-02-18 19:07:51 +08:00
Ivan Grokhotkov
19c2337168 soc: esp32s2: fix address of WDEV_RND_REG
Ref. ESP32-S2 TRM.

Closes IDF-1390
2020-02-18 08:24:33 +01:00
Ivan Grokhotkov
383ace9443 rtc_clk_cal: make compatible with the ESP32 2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
490bf29767 esp32s2: fix enabling 32k XTAL clock
On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.

fix clock choices

update rtc 32k xtal code for s2

missed api in rtc.h

bootloader_clock: update for S2
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
74ac618287 soc/rtc: update frequency switching APIs to match the master branch
esp32s2 code was based in IDF v3.1, and used outdated APIs.

Closes IDF-670
2020-02-17 17:23:32 +01:00
xiongyu
61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
morris
0d521e8f9d rmt: fix missing 0x in rmt_ll.h
Closes https://github.com/espressif/esp-idf/issues/4760
2020-02-17 15:20:41 +08:00
Krzysztof Budzynski
41bc06b9b9 Merge branch 'bugfix/docs_ledc' into 'master'
drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match

See merge request espressif/esp-idf!7532
2020-02-17 05:00:36 +08:00
Jiang Jiang Jian
cedea18acb Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master'
soc: clear PHY status when cpu start

Closes AUD-1125

See merge request espressif/esp-idf!7493
2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo
16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Angus Gratton
ea34f3bb27 drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match 2020-02-11 14:36:47 +11:00
Andrei Gramakov
4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Konstantin Kondrashov
daa9c30c8e rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c 2020-02-09 20:03:31 +08:00
Ivan Grokhotkov
4bfd0b961b Merge branch 'fix/spi_on_esp32s2' into 'master'
spi: support esp32s2

See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00
Ivan Grokhotkov
98bb3772e0 soc: spi_flash LL fixes 2020-02-07 16:18:31 +01:00
Wangjialin
aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Angus Gratton
11fac8637a docs: Resolve doxygen & Sphinx warnings 2020-02-07 16:37:45 +11:00
Angus Gratton
fda4efa300 Merge branch 'bugfix/rtc_wdt_timeout' into 'master'
soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz

See merge request espressif/esp-idf!7499
2020-02-06 14:27:35 +08:00
Konstantin Kondrashov
739eb05bb9 esp32: add implementation of esp_timer based on TG0 LAC timer
Closes: IDF-979
2020-02-06 14:00:18 +08:00
KonstantinKondrashov
47a5d14e59 soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz 2020-02-05 15:16:28 +08:00
Ivan Grokhotkov
50466a5e4f Merge branch 'bugfix/esp32s2_ldscripts' into 'master'
esp32s2: LD script fixes/improvements and re-enable SystemView examples

Closes IDF-1357, IDF-1354, and IDF-1346

See merge request espressif/esp-idf!7431
2020-02-05 02:09:29 +08:00
Xia Xiaotian
1833b8aeab soc: clear PHY status when cpu start 2020-02-04 14:37:16 +08:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Michael (XIAO Xufeng)
9d41829e09 spi: update esp32s2 hardware description files 2020-01-26 17:24:11 +08:00
Ivan Grokhotkov
3eb190ce48 esp32s2: fix interrupt names used by SystemView 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
02a99e84c8 esp32s2: move trace memory reservation to soc_memory_layout.c 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
354ce68dce soc: move reserved regions out of memory_layout_utils.c
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
70752baba4 esp32s2: add brownout detector support
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
46035032cf esp32s2: fix inconsistency between reg and struct headers
test_mux register doesn't exist in RTCCNTL anymore, remove it from
struct header. Also remove adc_ll_vref_output implementation, which
depends on that register.
2020-01-23 11:30:11 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
morris
95743f4ee6 update rtc_sleep_init for esp32s2 2020-01-22 10:19:05 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
morris
2422c52851 global: hello world on real esp32-s2 2020-01-16 17:43:59 +08:00
Wangjialin
d4e5980823 flash: fix 80Mhz for new spi flash driver on esp32s2 2020-01-16 17:43:59 +08:00
Wangjialin
fad639f0d4 feature(psram): update psram initialization.
1. use spi functions in rom
2. remove unnecessary GPIO configurations.
3. remove unnecessary dummy settings.
4. enable dummy out function
5. flash and psram have independent timing setting registers.
6. no need to set 1.9v for LDO in 80Mhz
7. set IO driver ability to 1 by default.
8. no need to use GPIO matrix on esp32s2, IO MUX is recommended
9. enable spi clock mode and IO mode settings
2020-01-16 17:41:31 +08:00
morris
1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Angus Gratton
c7738f24fc Merge branch 'bugfix/ledc_driver_enums' into 'master'
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum

See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Angus Gratton
782fc0df5f Merge branch 'refactor/can_driver' into 'master'
Refactor CAN to use HAL and LowLevel layers

Closes IDF-617

See merge request espressif/esp-idf!7019
2020-01-10 14:22:02 +08:00
Darian Leung
a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
suda-morris
1ffb546135 esp32s2:remove unsupported xtal choice
ESP32-S2 only supports 40MHz XTAL and doesn't have XTAL autodetection.
2020-01-09 13:09:21 +08:00
michael
f676a3b190 driver, soc: update multichip support headers 2020-01-06 17:13:54 +08:00
Ivan Grokhotkov
52f8aa2adb Merge branch 'feature/heap_non_os_build' into 'master'
heap: make compatible with non-OS builds, remove target dependence

Closes IDF-1236

See merge request espressif/esp-idf!7051
2020-01-03 17:12:51 +08:00
Angus Gratton
7dc7557aa9 soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-03 17:31:40 +11:00
Ivan Grokhotkov
d9534b3d6a soc: fix backtraces containing ROM functions
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov
4bbfa6e494 Merge branch 'feature/soc_ledc_caps' into 'master'
soc: add ledc_caps.h, replace target-based ifdefs with caps-based

See merge request espressif/esp-idf!6858
2019-12-30 18:47:11 +08:00
Angus Gratton
bc02b128be Merge branch 'feature/add_eth_download_test' into 'master'
ethernet: test download blob && phy addr auto detect

Closes IDF-1238

See merge request espressif/esp-idf!6957
2019-12-30 11:52:40 +08:00
Ivan Grokhotkov
e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
Ivan Grokhotkov
3285ed116d heap: make compatible with non-OS builds, remove target dependence 2019-12-27 12:40:06 +01:00
Michael (XIAO Xufeng)
72cf67cba3 sdio_slave_hal: fix the TAG non-static issue
(MINOR CHANGE)
2019-12-24 16:50:09 +08:00
morris
7baf7ce273 ethernet: optimise tx and rx 2019-12-24 11:18:31 +08:00
Ivan Grokhotkov
c029888bf1 Merge branch 'fix/spi_ut_esp32s2beta' into 'master'
spi: re-enable the unit tests for esp32s2beta

Closes IDF-1020

See merge request espressif/esp-idf!6327
2019-12-23 15:10:31 +08:00
morris
888316fc64 bootloader_support: refactor to better support multi target 2019-12-23 05:45:17 +00:00
michael
262ba6f825 spi: fix iomux, timing and address phase issues for esp32s2beta 2019-12-23 10:23:00 +08:00
michael
11fa11000f spi: re-enable the unit tests for esp32s2beta 2019-12-23 10:22:59 +08:00
Mahavir Jain
e8db1c4da0 Merge branch 'feature/enable_i2s_tests_on_esp32s2beta' into 'master'
Enable i2s and freertos test/s on esp32s2beta

See merge request espressif/esp-idf!6790
2019-12-18 17:51:54 +08:00
kewal shah
eec8212237 add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty 2019-12-16 20:26:04 +00:00
Angus Gratton
435dd546cc driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.

The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.

Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.

To avoid accidental errors, make the numeric values for the two similarly named enums the same.,

Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
2019-12-16 19:43:11 +11:00
Mahavir Jain
8b05cf41ad i2s: enable tests for esp32s2beta 2019-12-16 11:53:33 +05:30
Michael (XIAO Xufeng)
0ec08ca21b sdio_slave: support HAL layer 2019-12-13 18:33:15 +08:00
Wang Jia Lin
f5e60524ac Merge branch 'bugfix/fix_i2c_driver_breakingchange_issue' into 'master'
bugfix(i2c): fix I2C driver breaking change issue

See merge request espressif/esp-idf!6809
2019-12-06 16:50:16 +08:00
houwenxiang
aac935ec81 bugfix(i2c): fix I2C driver breaking change issue.
1. Fixed I2C driver breaking change issue.
    2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
houwenxiang
e4230d11ca bugfix(UART): fix uart driver spinlock misused bug
1. fix uart driver spinlock misused bug
    2. add uart driver ut test case
    3. undo the change in light_sleep_example_main.c
2019-12-03 16:06:31 +08:00
Wang Jia Lin
1ffcb54444 Merge branch 'bugfix/fix_esp32-s2_rtc_io_issue' into 'master'
bugfix(gpio): fix esp32 s2 rtc io issue and gpio testcase issues

See merge request espressif/esp-idf!6832
2019-12-03 11:17:41 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
xiongyu
af4c455417 bugfix(gpio):fix esp32 s2 rtc io issue
* Modify the function implementation of ESP32-S2 RTC GPIO
  On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
  On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
* Add ESP32-S2 support of unit test
* Modify the pull-up test of unit test
* Modify the interrupt test of unit test
* Modify input and output mode test of unit test
2019-11-27 17:18:20 +08:00
Angus Gratton
91b7a7beaf Merge branch 'bugfix/timer_intr_status_get' into 'master'
bugfix(timer): fix get intr status function

See merge request espressif/esp-idf!6807
2019-11-27 09:13:16 +08:00
Angus Gratton
64c8b640a1 Merge branch 'feature/log_component_noos' into 'master'
log: make compatible with non-OS builds

See merge request espressif/esp-idf!6787
2019-11-27 08:34:22 +08:00
chenjianqiang
bcfe684951 bugfix(timer): add a macro to control making the XTAL related functions 2019-11-26 12:39:46 +00:00
chenjianqiang
856d9f7d89 bugfix(timer): recover get raw interrupt status function 2019-11-26 12:39:46 +00:00
houwenxiang
f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00
kooho
f0f20e0496 bugfix(i2c): fix esp32-s2 i2c driver UT issue 2019-11-26 12:01:18 +08:00
Angus Gratton
f2a1a6105a Merge branch 'feat/mcpwm_hal'
Manual merge of !6626
2019-11-25 17:18:48 +11:00
Angus Gratton
6dd36fd571 Merge branch 'refactor/hal_gpio_driver'
Manual merge of !5597
2019-11-25 10:49:40 +11:00
Angus Gratton
f34edba8f3 Merge branch 'feature/adc_driver_hal_support'
Manual merge of !6044
2019-11-25 10:22:06 +11:00
michael
538540ce21 mcpwm: add HAL layer support
Also improved the unit tests a bit.
2019-11-25 00:36:30 +08:00
xiongyu
a3b79e9202 refactor(gpio): add hal gpio driver 2019-11-22 17:24:53 +08:00
fuzhibo
f49b192a5e refactor the adc driver 2019-11-22 15:42:16 +08:00
Mahavir Jain
25c0752682 i2s: fix regression in retrieval of chip revision causing apll test to fail 2019-11-22 11:46:38 +05:30
Wang Jia Lin
a8d3e3ab4a Merge branch 'feature/dac_driver_hal_support' into 'master'
dac: add hal for dac driver

See merge request espressif/esp-idf!5591
2019-11-22 13:59:32 +08:00
fuzhibo
03ac1aaafd dac: refactor driver add hal 2019-11-22 11:44:46 +08:00
Angus Gratton
0e0994092e Merge branch 'feature/esp32s2beta_fix_rtc_peripheral_driver' into 'master'
Driver: fix touch driver and deep sleep example

See merge request espressif/esp-idf!6476
2019-11-22 11:39:41 +08:00
Ivan Grokhotkov
951ed739f7 soc/cpu: add non-xtensa-specific replacement of xthal_get_ccount 2019-11-21 19:22:35 +01:00
houwenxiang
28286183d1 feature(I2C): Add i2c hal support. 2019-11-21 20:34:07 +08:00
fuzhibo
246242dbd5 driver: fix sens_struct.h;
driver: fix timer wakeup dsleep;
example: fix EXT1 wakeup dsleep;
example: fix touch pad wakeup dsleep;
2019-11-21 20:31:34 +08:00
chenjianqiang
857dec108d feat(ledc): refactor ledc driver
1. add hal and low-level layer for ledc driver
2. support esp32s2beta ledc
2019-11-21 16:25:22 +08:00
chenjianqiang
9f9da9ec96 feat(timer): refator timer group driver
1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
2019-11-21 14:14:19 +08:00
xiongyu
e62b831867 refactor(sigmadelta): add hal sigmadelta driver 2019-11-21 11:53:07 +08:00
fuzhibo
0c2bf7c8bc rtcio: add hal for driver 2019-11-21 10:40:49 +08:00
Angus Gratton
b30b0e59fa Merge branch 'feature/add_rmt_hal' into 'master'
rmt: add hal layer and new examples

Closes IDF-841, IDF-844, and IDF-857

See merge request espressif/esp-idf!5649
2019-11-21 09:53:54 +08:00
Angus Gratton
95b9b41258 Merge branch 'bugfix/ethernet_add_reference_counter' into 'master'
ethernet: add reference counter for mac and phy && add gpio config outof Kconfig

Closes IDF-1056

See merge request espressif/esp-idf!6682
2019-11-21 06:58:13 +08:00
Wang Jia Lin
f9d5b67b81 Merge branch 'refactor/hal_i2s_driver' into 'master'
refactor(i2s): add hal i2s driver

Closes IDFGH-2097

See merge request espressif/esp-idf!5601
2019-11-20 17:45:21 +08:00
morris
8fd8695ea1 rmt: add HAL layer 2019-11-20 10:54:21 +08:00
suda-morris
05d71319de ethernet: add gpio number into config structure 2019-11-20 10:36:45 +08:00
Anton Maklakov
bd49b3f315 Merge branch 'bugfix/soc_missing_tests' into 'master'
soc: fix unit tests not included in the build

See merge request espressif/esp-idf!6723
2019-11-20 00:32:43 +08:00
xiongyu
8c76a3c10d refactor(i2s): add hal i2s driver 2019-11-19 22:19:19 +08:00
Anton Maklakov
f04e45b340 soc: remove invalid esp32s2beta tests
Need to update them later, ref: IDF-1169
2019-11-18 16:05:37 +07:00
Anton Maklakov
7b0be33a7a soc: fix unit tests not included in the build
Regression from 9eccd7c082
2019-11-18 15:58:49 +07:00
xiongyu
b1a72866ca refactor(pcnt): add hal pcnt driver 2019-11-18 14:35:46 +08:00
KonstantinKondrashov
e3ff160733 soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
KonstantinKondrashov
f9e0e3557f soc/esp32s2beta: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
Angus Gratton
8675a818f9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-22 13:51:49 +11:00
Ivan Grokhotkov
c7d8ef52ca Merge branch 'fix/esp_flash_no_qe' into 'master'
esp_flash: fix the QE write issue in high freq, and support UT for external chips

Closes IDF-888

See merge request espressif/esp-idf!5736
2019-10-20 13:59:30 +08:00
Angus Gratton
ae21d669b9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-17 18:22:08 +11:00
Darian
820fd6447d can: Add support for lower bit rates
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-10-17 12:33:17 +08:00
Angus Gratton
f5238d5e42 Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-10-15 15:03:45 +11:00
Angus Gratton
496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng)
15d311bb80 esp_flash: rename internal variables for better readability
chip_drv in HAL are renamed as host
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
suda-morris
13c128fd31 Ethernet: optimize and bugfix
1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
2019-10-11 12:15:17 +08:00
Angus Gratton
8c1f3cb6b2 Merge branch 'feature/esp32s2beta_isr_table' into 'feature/esp32s2beta'
soc: Add interrupt numbers mapping for esp32s2beta

See merge request espressif/esp-idf!6204
2019-10-08 12:45:26 +08:00
Ivan Grokhotkov
5830f529d8 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-02 19:01:39 +02:00
KonstantinKondrashov
c5c41eab46 soc: Add interrupt numbers mapping for esp32s2beta
Closes: IDF-999
2019-09-26 00:22:36 +08:00
Roland Dobai
5a916ce126 Support ELF files loadable with gdb 2019-09-24 07:19:50 +00:00
KonstantinKondrashov
c4da959fa7 soc: Fix setting timeout for RTC_WDT 2019-09-23 14:57:26 +08:00
Angus Gratton
adfc06a530 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-20 10:28:37 +10:00
Angus Gratton
83680bd96b Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-09-19 21:08:20 +10:00
Jiang Jiang Jian
d78831ab2b Merge branch 'bugfix/remove_v40_deprecations' into 'master'
Remove features deprecated before ESP-IDF V4.0

Closes IDF-507

See merge request espressif/esp-idf!5841
2019-09-19 16:07:01 +08:00
Angus Gratton
bcaaaa1632 Merge branch 'feature/esp32s2beta_wdt' into 'feature/esp32s2beta'
esp32s2beta: Re-enable interrupt WDT, RTC_WDT, Task wdt

See merge request espressif/esp-idf!5786
2019-09-19 11:10:58 +08:00
Angus Gratton
438d513a95 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-16 16:18:48 +10:00
Michael (XIAO Xufeng)
511820820e esp_flash: fix the coredump issue
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
2019-09-14 17:01:36 +08:00
Jack
95ec36afd4 dport: remove clock_en and reset bitname which is not suitable 2019-09-13 09:44:07 +10:00
Angus Gratton
33a186f630 soc: Remove deprecated LEDC struct register names (bit_num, div_num)
Deprecated since ESP-IDF V3.0
2019-09-13 09:44:07 +10:00
Angus Gratton
6195c69701 soc: remove deprecated io_mux PIN_PULLxxx_yyy macros
Deprecated before ESP-IDF V1.0!
2019-09-13 09:44:07 +10:00
Angus Gratton
11c1da5276 soc/pm: Remove deprecated use of rtc_cpu_freq_t enum
Removes deprecated ways of setting/getting CPU freq, light sleep freqs.

Deprecated since ESP-IDF V3.2
2019-09-13 09:44:07 +10:00
KonstantinKondrashov
d3637cd06b rtc_wdt: re-enable RTC_WDT 2019-09-13 00:03:52 +08:00
Michael (XIAO Xufeng)
d7d5aebdee soc: fix memory map for esp32 and esp32s2beta 2019-09-12 16:17:52 +08:00
Angus Gratton
35147119f1 Merge branch 'feature/support_ut_esp32s2beta' into 'feature/esp32s2beta'
ci: support build and run UT for esp32s2beta

See merge request espressif/esp-idf!5702
2019-09-09 08:34:16 +08:00
jiangguangming
c057c141eb Fix bug for reserved memory regions
1. Release 16KB memory of reserved regions to heap
2. Modify the dram_seg address of bootloader to 0x3FFF8000, size is 16K
2019-09-05 19:00:14 +08:00
Li Shuai
bd29202520 1. Fix backtrace is incomplete
2. Optimization code style
2019-09-05 18:40:33 +08:00
Angus Gratton
e44df658d5 spiram: Fix ESP32 SPIRAM when using SPIRAM_TYPE_AUTO, disable "AUTO" for ESP32-S2
Requirement to enable for ESP32-S2 captured in IDF-912.
2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
55859f59cb support for esp32s2beta 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
43135dc348 spi: convenient LL macro 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
3b39e60f97 driver: remove unused drivers for esp32s2beta 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
05739798c3 soc: s2beta support 2019-09-04 10:53:25 +10:00
Roland Dobai
612db28b6f Fix error code collision and CI check 2019-08-29 08:14:08 +00:00
fuzhibo
c9a911e4aa rtc: update from bringup branch 2019-08-22 15:03:18 +08:00
Angus Gratton
38d61f83db Merge branch 'feature/esp32s2beta_update' into 'feature/esp32s2beta'
esp32s2beta: Merge master into esp32s2beta branch

See merge request espressif/esp-idf!5724
2019-08-21 15:20:28 +08:00
Angus Gratton
685c9cc867 esp32sbeta: Add timer_ll.h 2019-08-19 15:03:48 +10:00
Angus Gratton
6990a7cd54 Merge branch 'master' into feature/esp32s2beta_update 2019-08-19 15:03:43 +10:00
Angus Gratton
74c2eb3aff Merge branch 'fix/esp_flash_set_get_wp' into 'master'
esp_flash: fix the set/get write protection functions

See merge request espressif/esp-idf!5682
2019-08-16 06:14:48 +08:00
Angus Gratton
367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master'
timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656
2019-08-14 15:32:16 +08:00
KonstantinKondrashov
62ee29250e soc: Update rtc_vddsdio_get_config for esp32s2beta
Closes: IDF-749
2019-08-13 20:04:49 +08:00
Angus Gratton
18c5cfadae Fix function prototypes 2019-08-13 17:14:16 +10:00
Angus Gratton
c47e1756f8 examples: Rename deprecate CONFIG_CONSOLE_UART_NUM macro 2019-08-13 17:14:16 +10:00
suda-morris
f86e82cb63 efuse: update the scheme of getting chip revision 2019-08-13 10:59:02 +08:00
Michael (XIAO Xufeng)
d850a0bd1c esp_attr: add flag_attr to support enums used as flags 2019-08-09 13:46:32 +08:00
Michael (XIAO Xufeng)
feea477023 timer_group: add LL functions for WDT 2019-08-09 13:46:30 +08:00
Michael (XIAO Xufeng)
c02981a99b timer_group: support interrupt LL and some utility functions in ISR 2019-08-09 13:46:30 +08:00
chenjianqiang
a97fe5615f feat(timer): refator timer group driver (partly pick) 2019-08-09 13:46:29 +08:00
Michael (XIAO Xufeng)
e947522f38 esp_flash: improve the comments a bit 2019-08-08 23:18:01 +08:00
Angus Gratton
04ae56806c Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 15:26:58 +10:00
Angus Gratton
24d26fccde Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 13:44:24 +10:00
morris
1877a9fcd8 Merge branch 'feature/esp32s2beta_rtc_driver' into 'feature/esp32s2beta'
Feature/esp32s2beta rtc driver

See merge request espressif/esp-idf!5243
2019-08-07 14:43:17 +08:00
fuzhibo
572084821b add Comment for touchpad 2019-08-07 11:39:17 +08:00
fuzhibo
b055bff580 1.update touch driver; 2.update adc/dac driver; 3.add temp sensor driver; 2019-08-05 16:21:18 +08:00
kooho
2139ca668d Update I2S driver for esp32s2beta. 2019-08-05 16:05:16 +08:00
Anton Maklakov
afbaf74007 tools: Mass fixing of empty prototypes (for -Wstrict-prototypes) 2019-08-01 16:28:56 +07:00
kooho
f98e7bbccf Update LEDC, PCNT,Timer_Group driver for esp32s2beta. 2019-07-31 16:03:22 +08:00
Angus Gratton
eae6f5a1d6 Merge branch 'feature/esp32s2beta_rmt_driver' into 'feature/esp32s2beta'
Driver(RMT): Update RMT driver for esp32s2beta

See merge request espressif/esp-idf!5227
2019-07-30 18:21:59 +08:00
Michael (XIAO Xufeng)
fa555e3109 esp_flash: fix a compatibility issue working with the ROM
The esp_flash API has a side effects: it modifies the clock control
registers, and this makes the clock inconsistent with the ROM variable
`g_rom_spiflash_dummy_len_plus`.

This commit helps the ROM to get the correct dummy cycles required by
the latest clock settings. Every device on the SPI1 bus will update the
ROM variable when it modifies the clock registers.
2019-07-29 03:00:09 +00:00
suda-morris
018de8101f ethernet: can build without enable esp32 emac
Closes https://github.com/espressif/esp-idf/issues/3770
2019-07-22 21:07:02 +08:00
Tomer Shefler
97ad2bcb86 ethernet: support giving 50mhz rmii clock with both 40mhz and 26 mhz rtc xtal
Merges https://github.com/espressif/esp-idf/pull/3769
Closes https://github.com/espressif/esp-idf/pull/3704
2019-07-22 21:07:02 +08:00
suda-morris
af78311975 ethernet: malloc hal together with driver context 2019-07-22 21:07:02 +08:00
chenjianqiang
e43513b610 bugfix(uart): uniform AT_CMD char configuration 2019-07-18 19:24:13 +08:00
chenjianqiang
91ae40e2ff uart: multichip support 2019-07-18 15:57:00 +08:00
chenjianqiang
4cc962353c feat(uart): update uart driver for esp32s2beta 2019-07-18 15:57:00 +08:00
KonstantinKondrashov
ffaee97e81 soc/esp32s2beta: Exclude DPORT check 2019-07-15 06:51:03 +00:00
houwenxiang
6a8fe5cf79 Update RMT driver for esp32s2beta 2019-07-11 19:15:05 +08:00
chenjianqiang
667113cf94 feat(i2c): update i2c driver for esp32s2beta 2019-07-10 11:41:36 +08:00
Michael (XIAO Xufeng)
25ab8380c8 ci: support to build esp32s2beta simple examples 2019-07-08 09:16:06 +08:00
suda-morris
cb42c29252 ethernet: support dm9051
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
2019-07-04 19:38:13 +08:00
boarchuz
b0168310db Typo correction
Merges https://github.com/espressif/esp-idf/pull/3604
2019-07-02 17:49:49 +08:00
Jiang Jiang Jian
e2b88207b4 Merge branch 'feature/esp32s2beta_wifi' into 'feature/esp32s2beta'
run WiFi on ESP32SBETA

See merge request idf/esp-idf!5293
2019-06-30 00:40:34 +08:00
Xia Xiaotian
99ef587a05 run WiFi on ESP32SBETA 2019-06-28 11:34:49 +08:00
Ivan Grokhotkov
d7d91225d3 Merge branch 'feature/refactor_etherent_driver' into 'master'
add esp_eth component

Closes IDF-324, IDF-637, and IDFGH-1139

See merge request idf/esp-idf!5111
2019-06-28 03:44:44 +08:00
Michael (XIAO Xufeng)
d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
suda-morris
90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00
Michael (XIAO Xufeng)
17378fd4c2 spi: support new chip esp32s2beta 2019-06-23 12:17:27 +08:00
Michael (XIAO Xufeng)
93ef3980e7 spi: fix cmakelists missing 2019-06-22 19:09:06 +08:00
Michael (XIAO Xufeng)
9b13a04abf spi: multichip support
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
2019-06-22 19:08:47 +08:00
Renz Christian Bagaporo
9b350f9ecc cmake: some formatting fixes
Do not include bootloader in flash target when secure boot is enabled.
Emit signing warning on all cases where signed apps are enabled (secure
boot and signed images)
Follow convention of capital letters for SECURE_BOOT_SIGNING_KEY
variable, since it is
relevant to other components, not just bootloader.
Pass signing key and verification key via config, not requiring
bootloader to know parent app dir.
Misc. variables name corrections
2019-06-21 19:53:29 +08:00
Renz Christian Bagaporo
9eccd7c082 components: use new component registration api 2019-06-21 19:53:29 +08:00
Angus Gratton
bd9590502c Merge branch 'bugfix/spi_flash_remove_include_chain_in_host_drv' into 'master'
esp_flash: support C++ and improve the document

See merge request idf/esp-idf!5287
2019-06-21 13:12:09 +08:00
Angus Gratton
126b687c75 Merge branch 'refactor/vfs_uart_multichip_support' into 'master'
vfs_uart & uart: add multichip support

See merge request idf/esp-idf!5298
2019-06-20 18:31:24 +08:00
Michael (XIAO Xufeng)
ea1dcf7fe4 gpio: fix missing cmakelists for esp32s2beta 2019-06-20 12:06:51 +08:00
chenjianqiang
cf2ba210ef uart: multichip support 2019-06-20 11:32:22 +08:00
Ivan Grokhotkov
026533cd72 esp_flash: fix C++ compilation and some typos 2019-06-20 10:55:13 +08:00
Michael (XIAO Xufeng)
caf121e4b6 esp_flash: break the inappropriate include chain in spi_flash_host_drv.h 2019-06-20 10:55:12 +08:00
Michael (XIAO Xufeng)
5c9dc44c49 spi: multichip support
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
2019-06-20 10:38:52 +08:00
Darian Leung
037c079e9a esp32: Refactor backtrace and add esp_backtrace_print()
This commit refactors backtracing within the panic handler so that a common
function esp_backtrace_get_next_frame() is used iteratively to traverse a
callstack.

A esp_backtrace_print() function has also be added that allows the printing
of a backtrace at runtime. The esp_backtrace_print() function allows unity to
print the backtrace of failed test cases and jump back to the main test menu
without the need reset the chip. esp_backtrace_print() can also be used as a
debugging function by users.

- esp_stack_ptr_is_sane() moved to soc_memory_layout.h
- removed uncessary includes of "esp_debug_helpers.h"
2019-06-19 18:30:18 +08:00
suda-morris
3f7a571c90 fix errors when ci testing for esp32 2019-06-19 15:31:47 +08:00
Michael (XIAO Xufeng)
1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00
fuzhibo
29ea0dec76 Driver: gpio and rtcio dirver update 2019-06-14 20:27:26 +08:00
Ivan Grokhotkov
51a7df196d esp32s2beta: fix soc_memory_layout
1. use SOC_RESERVE_MEMORY_REGION
2. reserve part of the DRAM which is mapped to same banks as IRAM
2019-06-13 01:34:54 +08:00
Ivan Grokhotkov
dcaae4a5fc esp32s2beta: convert some todos to warnings 2019-06-12 15:53:57 +08:00
suda-morris
4a79d750a5 clean up build warnings 2019-06-11 13:07:37 +08:00
Angus Gratton
ddbd09eb15 esp32/esp32s2beta: Extract common SPIRAM options into esp_commmon component 2019-06-11 13:07:37 +08:00
suda-morris
82c27a39f2 can build and run hello-world app 2019-06-11 13:07:37 +08:00
Angus Gratton
047aca97e8 esp32s2beta: Fix heap memory regions when SPIRAM is disabled 2019-06-11 13:07:37 +08:00
suda-morris
84b2f9f14d build and link hello-world for esp32s2beta 2019-06-11 13:07:37 +08:00
suda-morris
61ce868396 make bootloader_support support esp32s2beta 2019-06-11 13:07:02 +08:00
suda-morris
91508ca27f add esp32s2beta in soc component 2019-06-11 13:06:32 +08:00
Gautier Seidel
542e544faa esp32: Allow fixed static RAM size and DRAM heap size
Merges https://github.com/espressif/esp-idf/pull/3222
2019-06-06 18:23:04 +10:00
Angus Gratton
045aaf6fb0 Merge branch 'feature/add_xxx_periph_h' into 'master'
soc: Add xxx_periph.h for all modules

Closes IDF-192

See merge request idf/esp-idf!4952
2019-06-04 13:24:14 +08:00
Wu Jian Gang
4d3762a8df clk: Fix the overflow when setting ccount
The multiplication will be overflow when using 160 or 240 MHz, this can lead the inaccuracy of log time stamp in startup.
2019-06-03 11:04:47 +00:00
Konstantin Kondrashov
399d2d2605 all: Using xxx_periph.h
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .

Cleaned up header files from unnecessary headers (releated to soc/... headers).
2019-06-03 14:15:08 +08:00
Konstantin Kondrashov
3ddab0b8f3 soc: Add xxx_periph.h for all modules
The "xxx_periph" header file includes all SOC-level definitions for that peripheral.

Closes: IDF-192
2019-06-03 13:56:54 +08:00
Jeroen Domburg
0e7442bb7a Merge branch 'feature/spi_slave_support_hal' into 'master'
spi_slave: add HAL support

See merge request idf/esp-idf!4830
2019-05-22 13:42:11 +08:00
Roland Dobai
a1bddb923b Rename Kconfig options (components/bt) 2019-05-21 09:09:01 +02:00
Roland Dobai
0ae53691ba Rename Kconfig options (components/esp32) 2019-05-21 09:09:01 +02:00
Michael (XIAO Xufeng)
33db6d608e spi_slave: add HAL support 2019-05-20 07:34:34 +00:00
Ivan Grokhotkov
2b301f53e4 Merge branch 'bugfix/fix_build_make_macos' into 'master'
make: fix build failure on macos with GNU make <= 3.81

See merge request idf/esp-idf!5010
2019-05-20 10:44:49 +08:00
David Cermak
8f91d730da make: fix build failure on macos with GNU make <= 3.81
Closes https://github.com/espressif/esp-idf/issues/3459
2019-05-16 14:09:43 +02:00
Renz Christian Bagaporo
ffec9d4947 components: update with build system changes 2019-05-13 19:59:17 +08:00
michael
0b523c2300 spi_master: fix the dual/quad io issue
introduced in f871cc5ffa

The issue is caused by

1. The hal didn't pass the io_mode to LL.
2. The setup_device function overwrite the trans-specific settings.
2019-04-27 01:36:47 +08:00
Michael (XIAO Xufeng)
9a00b7706e fix the dram low addr defined in the soc.h header 2019-04-25 17:29:48 +08:00
Michael (XIAO Xufeng)
562af8f65e global: move the soc component out of the common list
This MR removes the common dependency from every IDF components to the SOC component.

Currently, in the ``idf_functions.cmake`` script, we include the header path of SOC component by default for all components.
But for better code organization (or maybe also benifits to the compiling speed), we may remove the dependency to SOC components for most components except the driver and kernel related components.

In CMAKE, we have two kinds of header visibilities (set by include path visibility):

(Assume component A --(depends on)--> B, B is the current component)

1. public (``COMPONENT_ADD_INCLUDEDIRS``): means this path is visible to other depending components (A) (visible to A and B)
2. private (``COMPONENT_PRIV_INCLUDEDIRS``): means this path is only visible to source files inside the component (visible to B only)

and we have two kinds of depending ways:

(Assume component A --(depends on)--> B --(depends on)--> C, B is the current component)

1. public (```COMPONENT_REQUIRES```): means B can access to public include path of C. All other components rely on you (A) will also be available for the public headers. (visible to A, B)
2. private (``COMPONENT_PRIV_REQUIRES``): means B can access to public include path of C, but don't propagate this relation to other components (A). (visible to B)

1. remove the common requirement in ``idf_functions.cmake``, this makes the SOC components invisible to all other components by default.
2. if a component (for example, DRIVER) really needs the dependency to SOC, add a private dependency to SOC for it.
3. some other components that don't really depends on the SOC may still meet some errors saying "can't find header soc/...", this is because it's depended component (DRIVER) incorrectly include the header of SOC in its public headers. Moving all this kind of #include into source files, or private headers
4. Fix the include requirements for some file which miss sufficient #include directives. (Previously they include some headers by the long long long header include link)

This is a breaking change. Previous code may depends on the long include chain.
You may need to include the following headers for some files after this commit:

- soc/soc.h
- soc/soc_memory_layout.h
- driver/gpio.h
- esp_sleep.h

The major broken include chain includes:

1. esp_system.h no longer includes esp_sleep.h. The latter includes driver/gpio.h and driver/touch_pad.h.
2. ets_sys.h no longer includes soc/soc.h
3. freertos/portmacro.h no longer includes soc/soc_memory_layout.h

some peripheral headers no longer includes their hw related headers, e.g. rom/gpio.h no longer includes soc/gpio_pins.h and soc/gpio_reg.h

BREAKING CHANGE
2019-04-16 13:21:15 +08:00
Angus Gratton
f871cc5ffa Merge branch 'feat/spi_hal_support' into 'master'
spi_master: refactor and add HAL support

See merge request idf/esp-idf!4159
2019-04-15 07:57:11 +08:00
Angus Gratton
8e91677701 Merge branch 'bugfix/bootloader_flash_crypt_cnt_ff' into 'master'
flash encryption: reduce FLASH_CRYPT_CNT bit width to 7 bits

See merge request idf/esp-idf!4642
2019-04-09 08:10:06 +08:00
Renz Christian Bagaporo
90ee405afd ldgen: update component linker fragment files 2019-04-04 15:57:34 +08:00
huub
4aac441e46 soc:Added names to anonymous register structs
For typedef volatile struct in components/soc/esp32/include/soc

Merges https://github.com/espressif/esp-idf/pull/3199
2019-04-03 03:09:44 +00:00
Angus Gratton
4b4cd7fb51 efuse/flash encryption: Reduce FLASH_CRYPT_CNT to a 7 bit efuse field
8th bit is not used by hardware.

As reported https://esp32.com/viewtopic.php?f=2&t=7800&p=40895#p40894
2019-04-03 14:07:20 +11:00
Angus Gratton
ae585b6615 Merge branch 'bugfix/external_rtc_start_fail' into 'master'
Bugfix/external rtc start fail

See merge request idf/esp-idf!4374
2019-04-02 09:42:27 +08:00
Michael (XIAO Xufeng)
af2fc96ee1 spi_master: refactor and add HAL support 2019-03-28 17:14:50 +08:00
morris
dbdb299bb1 create xtensa component
1. move xtensa specific files out of esp32 component
2. merge xtensa-debug-module component into xtensa
2019-03-27 20:24:28 +08:00
morris
c159984264 separate rom from esp32 component to esp_rom
1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
2019-03-21 18:51:45 +08:00
Ivan Grokhotkov
106dc05903 Merge branch 'feature/specify_includes_belonging_esp32' into 'master'
move esp32 chip specific includes to esp32/xxx.h

See merge request idf/esp-idf!4534
2019-03-21 18:34:08 +08:00
Ivan Grokhotkov
6d4a7b1a7e Merge branch 'bugfix/cmake_soc_test' into 'master'
soc: fix compiling unit tests with CMake

Closes IDF-499

See merge request idf/esp-idf!4545
2019-03-21 13:34:58 +08:00
maojianxin
95301c16bd Fix external start fail 2019-03-20 18:34:01 +08:00
Zhang Jun Yi
5ba87240b5 soc/rtc: Bypass touchpad current to external 32k crystal oscillator 2019-03-20 18:34:01 +08:00
Ivan Grokhotkov
73851e0b5c soc: fix compiling unit tests with CMake
soc unit tests have not been included when compiling with CMake,
because ../${SOC_NAME}/test was not evaluated relative to the
CMakeLists.txt directory.

Also call register_components() regardless of the presence of test
directory for particular target.
2019-03-19 11:42:51 +08:00
morris
956c25dedd move esp32 chip specific includes to esp32/xxx.h 2019-03-18 17:14:05 +08:00
Angus Gratton
2dd3344342 heap: Add integer overflow checks on MALLOC_CAP_32BIT & MALLOC_CAP_EXEC 2019-03-18 01:41:58 +00:00
Konstantin Kondrashov
b8141f3ad8 efuse: Fix make/cmake build systems and docs 2019-02-28 07:31:29 +00:00
Konstantin Kondrashov
9822055851 efuse: Add support coding scheme to script
Added support using BLK1 and BLK2 in custom table.
Added change size key in BLK1 and BLK2 if coding scheme was changed.
2019-02-28 07:31:29 +00:00
Konstantin Kondrashov
d82023bf06 soc: Add support efuse 2019-02-28 07:31:29 +00:00
Ivan Grokhotkov
8cc6226051 soc: define named constants for DPORT_CPUPERIOD_SEL values 2019-02-26 17:07:59 +08:00
Ivan Grokhotkov
dda0208614 soc/rtc_clk: don’t clear DPORT_CPUPERIOD_SEL when switching to XTAL
This is not necessary since RTC_CNTL_SOC_CLK_SEL is set before this.
2019-02-26 17:02:34 +08:00
Angus Gratton
b966ef9fcd Merge branch 'bugfix/update_ledc_register_and_fix_fade_scale' into 'master'
Bugfix (ledc):  Fixed ledc fade scale  bug

See merge request idf/esp-idf!4109
2019-02-26 11:46:28 +08:00
Ivan Grokhotkov
dc133f9fc4 Revert "Merge branch 'bugfix/external_rtc_start_fail' into 'master'"
This reverts merge request !2441
2019-02-19 12:39:47 +08:00
Angus Gratton
6538acc94f Merge branch 'bugfix/wdt_compability_app_with_old_bootloader' into 'master'
esp32: Fix wdt settings in esp_restart_noos

See merge request idf/esp-idf!4098
2019-02-19 10:42:33 +08:00
maojianxin
0676941332 soc/rtc: fix RTC_TOUCH_TRIG_EN or RTC_ULP_TRIG_EN should keep RTC_PERIPH power on 2019-02-13 10:30:37 +08:00
Zhang Jun Yi
c5b4512a27 soc/rtc: Bypass touchpad current to external 32k crystal oscillator 2019-02-13 10:15:45 +08:00
Ivan Grokhotkov
2eabed161a Merge branch 'feature/merge_multiple_github_prs' into 'master'
Multiple Github PRs

See merge request idf/esp-idf!4146
2019-01-24 15:14:47 +08:00
Pieter du Preez
496bfe3842 Initialized some uninitialized variables in rtc_clk.c and ringbuf.c.
The following 2 compiler warnings are only reproducible when setting:
   OPTIMIZATION_FLAGS = -Ofast

esp-idf/components/soc/esp32/rtc_clk.c:
In function 'rtc_clk_cpu_freq_get':
esp-idf/components/soc/esp32/rtc_clk.c:506:12:
error: 'freq' may be used uninitialized in this function
[-Werror=maybe-uninitialized]
	return freq;

esp-idf/components/esp_ringbuf/ringbuf.c:
In function 'xRingbufferReceiveSplitFromISR':
esp-idf/components/esp_ringbuf/ringbuf.c:934:26:
error: 'pvTempTailItem' may be used uninitialized in this function
[-Werror=maybe-uninitialized]
	*ppvTailItem = pvTempTailItem;

Closes https://github.com/espressif/esp-idf/pull/2878
2019-01-23 16:47:23 +05:30
Wangjialin
78bea94d8a feature: add support for setting core voltage in high performance cases.
1. add definitions of EFUSE_RD_VOL_LEVEL_HP_INV in efuse_reg.h
2. modify the core voltage according to the record in efuse in high performance cases.
2019-01-22 12:13:58 +08:00
Wangjialin
d518a19d95 driver(ledc): fix ledc fade API and update the register header file
1. fix error when fading is too fast
2. fix error when setting duty and update immediately
3. update register header file to be in accord with TRM

closes https://github.com/espressif/esp-idf/issues/2903
2019-01-12 00:56:38 +08:00
Konstantin Kondrashov
82c5e648ad esp32: Fix wdt settings in esp_restart_noos
Fixed compatibility the new apps with the old bootloaders.

Closes: https://github.com/espressif/esp-idf/issues/2927
2019-01-10 20:22:26 +08:00
Ivan Grokhotkov
0cf8d1380e soc/rtc: reset another BBPLL related register
Follow-up to b21ffc8a: an additional register needs to be reset.

Ref. https://github.com/espressif/esp-idf/issues/2711
2018-12-12 12:24:48 +08:00
Ivan Grokhotkov
04c511c9b5 panic: dump some instruction memory on IllegalInstruction exception 2018-12-07 16:50:00 +08:00
Ivan Grokhotkov
b21ffc8a0c soc/rtc: reset BBPLL configuration after enabling it
A workaround to reset BBPLL configuration after light sleep. Fixes the
issue that Wi-Fi can not receive packets after waking up from light
sleep.

Ref. https://github.com/espressif/esp-idf/issues/2711
2018-12-06 14:43:24 +08:00
Angus Gratton
441e2d5011 Merge branch 'bugfix/register_structs_stdint' into 'master'
soc: Add "#include <stdint.h>" to all register structs

See merge request idf/esp-idf!3875
2018-12-05 08:05:56 +08:00
Jeroen Domburg
d6ee27e313 Merge branch 'feat/spi_check_length_buffer' into 'master'
spi: add checks for slave buffer valid and master length

See merge request idf/esp-idf!3744
2018-12-04 11:48:32 +08:00
Angus Gratton
7f32995a4c soc: Add "#include <stdint.h>" to all register structs
Closes https://github.com/espressif/esp-idf/issues/2239

TW24912
2018-12-04 11:17:38 +11:00
kooho
da223fad4e driver(rmt): Add API get rmt channel's status.
closes https://github.com/espressif/esp-idf/issues/1175
closes https://github.com/espressif/esp-idf/issues/2599
closes https://github.com/espressif/esp-idf/issues/2452
2018-11-28 07:20:45 +00:00
michael
cfba157fdd spi_slave: add valid check for DMA buffers
The DMA cannot receive data correctly when the buffer address is not
WORD aligned. Currently we only check whether the buffer is in the DRAM
region.

The DMA always write in WORDs, so the length arguments should also be
multiples of 32 bits.

A check is added to see whether the buffer is WORD aligned and has valid
length.
2018-11-26 03:49:26 +00:00
Ivan Grokhotkov
00a13bd8d3 Merge branch 'bugfix/init_memctl' into 'master'
bootloader, esp32: add workaround for Tensilica erratum 572

See merge request idf/esp-idf!3605
2018-11-19 18:36:47 +08:00
Ivan Grokhotkov
a46b884a14 Merge branch 'feature/unit_test_example' into 'master'
Move Unity into components, add unit test example

See merge request idf/esp-idf!3562
2018-11-19 18:35:54 +08:00
Ivan Grokhotkov
964f5a91f7 bootloader, esp32: add workaround for Tensilica erratum 572
If zero-overhead loop buffer is enabled, under certain rare conditions
when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.
2018-11-19 04:39:35 +00:00
Ivan Grokhotkov
6091021e83 unity: separate common and IDF specific functionality
New unity component can be used for testing other applications.
Upstream version of Unity is included as a submodule.
Utilities specific to ESP-IDF unit tests (partitions, leak checking
setup/teardown functions, etc) are kept only in unit-test-app.
Kconfig options are added to allow disabling certain Unity features.
2018-11-19 12:36:31 +08:00
Renz Bagaporo
63411fc556 tools: implement linker script generation 2018-11-16 12:42:02 +08:00
Ivan Grokhotkov
7efb3926c5 Merge branch 'feature/build_system_multi_target' into 'master'
build system: support for multiple targets (CMake only)

See merge request idf/esp-idf!3499
2018-11-12 15:30:36 +08:00
Ivan Grokhotkov
ccfa134533 build system: support for multiple targets 2018-11-11 21:46:02 +08:00
shawwwn
288d9b75e9 rtc_clk: bugfix: incorrect divider setting in rtc_clk_cpu_freq_to_config()
Merges https://github.com/espressif/esp-idf/pull/2404
2018-11-08 15:57:10 +05:30
Konstantin Kondrashov
8bba348528 aes/sha/mpi: Bugfix a use of shared registers.
This commit resolves a blocking in esp_aes_block function.

Introduce:
The problem was in the fact that AES is switched off at the moment when he should give out the processed data. But because of the disabled, the operation can not be completed successfully, there is an infinite hang. The reason for this behavior is that the registers for controlling the inclusion of AES, SHA, MPI have shared registers and they were not protected from sharing.

Fix some related issue with shared using of AES SHA RSA accelerators.

Closes: https://github.com/espressif/esp-idf/issues/2295#issuecomment-432898137
2018-11-05 04:22:47 +00:00
Michael (XIAO Xufeng)
4132834faa test: fix the unit test fail issue under single_core config
Introduced in 97e3542947.

The previous commit frees the IRAM part when single core, but doesn't
change the memory layout functions. The unit test mallocs IRAM memory
from the heap, accidently into the new-released region, which doesn't
match the memory layout function.

This commit update the memory layout function to fix this.
2018-10-31 17:04:32 +08:00
Jiang Jiang Jian
97e3542947 Merge branch 'bugfix/release_some_memory_on_single_core_mode' into 'master'
release memory not used in single core mode

See merge request idf/esp-idf!2733
2018-10-30 15:53:31 +08:00
Michael (XIAO Xufeng)
d0361a32d7 test: fix the IRAM type conflict issue using heap_caps_malloc 2018-10-25 12:31:44 +08:00
Renz Bagaporo
cc774111bf cmake: Add support for test build 2018-10-20 12:07:24 +08:00
Ivan Grokhotkov
bd11965f6c Merge branch 'bugfix/ndebug_build' into 'master'
soc,sdmmc: fix build failures when NDEBUG is used

See merge request idf/esp-idf!3352
2018-10-19 11:55:37 +08:00
Angus Gratton
f53fef9936 Secure Boot & Flash encryption: Support 3/4 Coding Scheme
Includes esptool update to v2.6-beta1
2018-10-16 16:24:10 +11:00
Ivan Grokhotkov
a20d9287fe soc: use _EARLY versions of ESP_LOG
Some logging done in soc component may happen before logging via
stdout is possible. Use _EARLY version of log calls to make sure that
output is visible. The downside is that application does not have a
way to silence these logs. However since the soc component doesn’t
use any LOGV/LOGD/LOGI and only logs warnings and errors, this should
not impact the application.
2018-10-15 14:59:46 +08:00
Ivan Grokhotkov
ab68b9d90d soc,sdmmc: fix build failures when NDEBUG is used
Use explicit error checking instead of asserts, use SOC_LOG to print
error/warning messages where needed.
2018-10-15 14:57:12 +08:00
Ivan Grokhotkov
22b840f3df bootloader: don’t reload RTC_FAST DRAM after deep sleep
When CONFIG_ESP32_RTCDATA_IN_FAST_MEM is enabled, RTC data is placed
into RTC_FAST memory region, viewed from the data bus. However the
bootloader was missing a check that this region should not be
overwritten after deep sleep, which caused .rtc.bss segment to loose
its contents after wakeup.
2018-09-29 14:02:16 +08:00
Jack
2efd6859ed release memory not used in single core mode
1. do not start ipc task in single core mode
2. do not use APP cpu cache memory in single core mode
3. relase data used in rom by APP cpu
2018-09-25 15:13:47 +08:00
negativekelvin
8e2856b83d soc: fix CPU frequency not updated in rtc_clk_init
Add missing call to rtc_clk_cpu_freq_set_config

Merges https://github.com/espressif/esp-idf/pull/2398
2018-09-12 21:13:42 +08:00
Renz Christian Bagaporo
d9939cedd9 cmake: make main a component again 2018-09-11 09:44:12 +08:00
Angus Gratton
cff2ef695a Merge branch 'master' into feature/cmake 2018-09-06 20:23:04 +08:00
Angus Gratton
b355854d4d Merge branch 'master' into feature/cmake 2018-09-05 10:35:04 +08:00
Konstantin Kondrashov
38098b713f esp32/sleep: Add a function to disable logging from ROM code 2018-09-04 16:03:18 +08:00
Konstantin Kondrashov
9c715d7946 bootloader_support: Fix enable rtc_wdt for resolve issue with varying supply
Eliminates the issue with the lock up in the bootloader due to a power drawdown during its operation.

Closes https://github.com/espressif/esp-idf/issues/1814
2018-09-03 05:43:01 +00:00
Angus Gratton
5fbfd20f10 Merge branch 'master' into feature/cmake 2018-08-30 18:52:31 +08:00
Angus Gratton
a9c4ed7139 Merge branch 'master' into feature/cmake 2018-08-30 18:51:01 +08:00
Ivan Grokhotkov
78fab8a0f9 sdmmc: implement partial DDR support
Works for 3.3V eMMC in 4 line mode.
Not implemented:
- DDR mode for SD cards (UHS-I) also need voltage to be switched to 1.8V.
- 8-line DDR mode for eMMC to be implemented later.
2018-08-30 13:11:54 +08:00
Mahavir Jain
f0fa66a50e rtc_wdt: fix overflow issue with setting wdt interval
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
2018-08-24 18:06:39 +05:30
Ivan Grokhotkov
88d40e01b4 Merge branch 'feature/rtc_slowclk_extra_options' into 'master'
Add more RTC_SLOW_CLK options

See merge request idf/esp-idf!2984
2018-08-23 11:27:14 +08:00
Ivan Grokhotkov
902344c516 Merge branch 'bugfix/trace_mem_layout_pro_cpu' into 'master'
soc: fix trace memory region for single core mode

See merge request idf/esp-idf!3029
2018-08-22 16:51:43 +08:00
Ivan Grokhotkov
5bf3654637 soc/rtc: Force power on 8M clock if it is used to derive RTC slow clock 2018-08-22 11:33:20 +08:00
Ivan Grokhotkov
8365f0f5d2 soc/rtc: add support for external 32k oscillator
Compared to external 32k XTAL, when active oscillator is used as input,
some parameters need to be set differently.
2018-08-22 11:33:20 +08:00
Ivan Grokhotkov
90f5456dba Merge branch 'feature/rtc_cpu_freq_config' into 'master'
soc/rtc: Refactoring, support CPU frequencies lower than XTAL

See merge request idf/esp-idf!2856
2018-08-22 11:32:08 +08:00
Ivan Grokhotkov
e59571eece soc/rtc_clk: reduce data size by disabling CSWTCH generation
Saves about 200 bytes of DRAM at the expense of 4 bytes in IRAM.
2018-08-21 13:02:46 +08:00
Ivan Grokhotkov
db2f0f45be soc/rtc_clk: split rtc_clk_init into separate object file
rtc_clk_init and related functions don’t need to be in IRAM/DRAM.
2018-08-21 13:02:46 +08:00
Ivan Grokhotkov
bcf79e5cf2 tests: use new CPU frequency setting API 2018-08-21 13:02:46 +08:00
Ivan Grokhotkov
bec70ce298 esp32: use new CPU frequency setting API 2018-08-21 13:02:46 +08:00
Ivan Grokhotkov
2e31cce390 soc/rtc: CPU frequency settings refactoring
Previous APIs used to set CPU frequency used CPU frequencies listed in
rtc_cpu_freq_t enumeration. This was problematic for two reasons.
First, supporting many possible frequency values obtained by dividing
XTAL frequency was hard, as every value would have to be listed in
the enumeration. Since different base XTAL frequencies are supported,
this further complicated things, since not all of these divided
frequencies would be valid for any given XTAL frequency. Second,
having to deal with enumeration values often involved switch
statements to convert between enumeration and MHz values, handle
PLL/XTAL frequencies separately, etc.

This change introduces rtc_cpu_freq_config_t structure, which contains
CPU frequency (in MHz) and information on how this frequency has to
be generated: clock source (XTAL/PLL), source frequency, clock
divider value. More fields can be added to this structure in the
future. This structure simplifies many parts of the code, since both
frequency value and frequency generation settings can be accessed in
any place in code without the need for conversions.

Additionally, this change adds setting of REF_TICK dividers to support
frequencies lower then XTAL with DFS.
2018-08-21 13:02:03 +08:00
Jiang Jiang Jian
00ef8bf726 Merge branch 'feature/decrease_bt_contrller_memory_with_new_mem_reserved' into 'master'
decrease bt contrller memory with new mem reserved

See merge request idf/esp-idf!2791
2018-08-16 19:12:44 +08:00
Angus Gratton
ff2404a272 Merge branch 'master' into feature/cmake 2018-08-16 17:14:17 +10:00
Mahavir Jain
0075e2f316 soc: fix trace memory region for single core mode
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
2018-08-15 20:52:39 +05:30
Konstantin Kondrashov
a8e46775c6 soc/rtc_wdt: Add API functions for rtc_wdt
Added functions:
rtc_wdt_protect_off/on
rtc_wdt_set_length_of_reset_signal
rtc_wdt_set_stage
rtc_wdt_set_time
rtc_wdt_feed
rtc_wdt_disable/enable
2018-08-14 17:48:02 +05:00
Tian Hao
ee787085f9 component/bt : decrease memory consumption by conn number
1. BLE only with 9(max) connection will decrease 3K DRAM
2. BR/EDR only with 7(max) connection will decrease 16K DRAM
3. Any of BLE or BR/EDR connection number decrease will also decrease DRAM consumption
4. Decrease one BLE connection will save about 1KB DRAM
5. Decrease one BR/EDR ACL connection will save about 1.2KB DRAM
6. Decrease one BR/EDR SCO/eSCO will save 2KB DRAM.
7. fix some definition and kconfig
8. remove 1.2k of vhci tx cache and make .bss & .data to heap about 1.4K
9. modify BT Reserved Memory size and modify example to support new bt kconfig
2018-08-14 02:29:17 +00:00
Ivan Grokhotkov
8739111218 Merge branch 'bugfix/gpio_reset_bitmask' into 'master'
gpio: Bitmask overflow fix in gpio_reset_pin

See merge request idf/esp-idf!2966
2018-08-10 17:35:26 +08:00
Taavi Hein
f7749e18a8 gpio: Bitmask overflow fix in gpio_reset_pin
For pins 32 and up the BIT(nr) macro used here overflowed,
causing undetermined GPIO pins to be reset.
Example: freeing SPI device/bus where CS is on pin 33
caused debug UART to cease communication, TXD0 was
disabled.

Fixed as BIT64(nr) macro, to be used elsewhere as needed.
For example in definitions like GPIO_SEL_32..GPIO_SEL_39.
2018-08-08 15:31:17 +03:00
Angus Gratton
a5ae5ac4b3 soc: Allow components to reserve fixed memory ranges that they need
No longer necessary to keep all reserved addresses in 'soc'.

Means 'soc' does not need to know about 'bt', for example.

Also means that Bluetooth can be enabled in config without any memory being reserved for BT
controller. Only if code calling the BT controller is linked in, will this memory be reserved...
2018-08-06 01:37:55 +00:00
David Cermak
409c91bcb9 removed possible uint16 access to 32bit register, noted fifo use not recommended 2018-07-23 07:57:18 +02:00
Ivan Grokhotkov
fec079cd44 Merge branch 'bugfix/rtc_io_hold_regs' into 'master'
Fix errors in rtc_gpio_desc values

See merge request idf/esp-idf!2765
2018-07-19 15:04:42 +08:00
Ivan Grokhotkov
5376a06d7b Merge branch 'bugfix/range_CONFIG_ESP32_RTC_CLK_CAL_CYCLES' into 'master'
soc/clk: Fix range CONFIG_ESP32_RTC_CLK_CAL_CYCLES

See merge request idf/esp-idf!2719
2018-07-17 19:43:11 +08:00
negativekelvin
8a9e3875ed
Fix errors in rtc_gpio_desc values 2018-07-12 23:16:15 -07:00
Angus Gratton
a67d5d89e0 Replace all DOS line endings with Unix
Command run was:
git ls-tree -r HEAD --name-only | xargs dos2unix
2018-07-12 19:10:37 +08:00
Konstantin Kondrashov
ac3508615a soc/clk: Fix range CONFIG_ESP32_RTC_CLK_CAL_CYCLES
Fixed the error division on zero.
Also fixed range CONFIG_ESP32_RTC_CLK_CAL_CYCLES in Kconfig.
Fixed a overflow error by TIMG in the function rtc_clk_cal_internal. This error was due to a limit in values TIMG_RTC_CALI_MAX=0x7FFF (to write the slowclk_cycles) and TIMG_RTC_CALI_VALUE=0x1FFFFFF (to read xtal_cycles). Added assert finctions.

Closes https://github.com/espressif/esp-idf/issues/2147
2018-07-10 11:56:12 +05:00
Darian Leung
1d2727f4c8 CAN Driver
The following commit contains the first version of the ESP32 CAN Driver.

closes #544
2018-07-04 14:01:57 +08:00
Konstantin Kondrashov
32da455384 soc: Fix check_long_hold_gpio and move def to soc
Fix factory_reset_pin init as input
Move definition a structure rtc_gpio_desc to soc

Closes https://github.com/espressif/esp-idf/issues/2030
2018-06-22 09:20:27 +05:00
Ivan Grokhotkov
4b91c82cc4 Merge branch 'feat/sdio_pullup' into 'master'
feature(sdio): add features to make SDIO slave compatible with more devkits

See merge request idf/esp-idf!2454
2018-06-20 13:58:56 +08:00
michael
5b37a96ddc feature(sdio): allow to enable internal pullups of the SDIO host and slave as a debug feature
NOTE: the internal pullups are not totally reliable, please do add external pullups on your bus.
2018-06-14 12:04:22 +08:00
Michael (XIAO Xufeng)
ebfda40b7c refactor(spi): move pin information into soc folder 2018-06-14 11:29:15 +08:00
Michael (XIAO Xufeng)
939e5693a5 chore(spi): fix the terms of native to iomux 2018-06-06 06:08:39 +00:00
michael
5cf7d3768d feat(spi_master): fine tune the timing of SPI 2018-06-06 06:08:39 +00:00
Angus Gratton
6b9784cc45 Merge branch 'master' into feature/cmake_update 2018-05-31 14:46:23 +10:00
Angus Gratton
3e1a93e5a7 soc: rtc_vddsdio_get_config() In default configuration, VDD_SDIO LDO is always enabled
When using bootstrapping pin to enable VDD_SDIO, the internal LDO is always enabled at either 1.8V
or 3.3V.
2018-05-25 15:14:13 +10:00
Angus Gratton
d775cc4c4c soc: Fix description of rtc_config_t.tieh, add macros
Usage of TIEH was correct but description had 1.8V & 3.3V backwards.

Add macro definitions for TIEH values to improve readability.
2018-05-25 14:58:37 +10:00
Angus Gratton
b8312a26c0 Merge branch 'feature/sdio_slave' into 'master'
feature(sdio_slave): add support for sdio_slave

See merge request idf/esp-idf!1829
2018-05-22 09:43:35 +08:00
Konstantin Kondrashov
e5b280f173 dport: Bigfix dport_read code move to IRAM
A new method of workaround an error with DPORT is to ensure that the APB is read and followed by the DPORT register without interruptions and pauses. This fix places this implementation in the IRAM to exclude errors associated with the cache miss.
2018-05-21 22:00:51 +05:00
Michael (XIAO Xufeng)
c73575de4f feat(sdio_slave): add headers for sdio slave components: slc, host, hinf 2018-05-21 23:48:33 +08:00
wangmengyang
22e21b38f7 component/bt: implement bluetooth modem sleep mode, one mode for BLE only and another for dual mode bluetooth
1. provide options for bluetooth low power mode
2. provide two options for bluetooth low power clock: main XTAL and external 32kHz XTAL
3. provide function and callbacks to control bluetooth low power mode, including enable/disable sleep, software wakeup request, low power clock settings, check power state, etc
4. modify vhci API vhci_host_send_packet to use blocking mode
5. note that DFS and bluetooth modem sleep can not be used together currently.
2018-05-19 15:37:26 +08:00
Angus Gratton
7ae1e9463e Merge branch 'bugfix/rtc_xtal_tests' into 'master'
ci: Only run XTAL unit tests assuming board has an XTAL

See merge request idf/esp-idf!2401
2018-05-15 18:44:46 +08:00
Angus Gratton
05e09a5bac ci: Only run XTAL unit tests assuming board has an XTAL, run less repeats 2018-05-15 15:43:24 +08:00
Angus Gratton
d1066e9d7f Merge branch 'feature/dport_access' into 'master'
soc: Dport access with pre-read register APB

See merge request idf/esp-idf!2257
2018-05-15 15:32:28 +08:00
Angus Gratton
662fe55996 Merge branch 'bugfix/select_rtc_slow_clk' into 'master'
esp32/clk: Fix starting rtc oscillator if it bad

See merge request idf/esp-idf!2215
2018-05-15 12:57:22 +08:00
Konstantin Kondrashov
9ad0760b9d esp32/clk:Fix starting rtc oscillator if it is bad
If the RTC crystal is bad or has no matched capacitance, then you do not need to start such the crystal. It is necessary to determine this case, output an error (about impossibility to start from the oscillator) and start from the internal RC of the chain.

Reduced the default value of the number of bootstrap cycles. Because we can oscillating the oscillator which then stops. (in Kconfig). Changed from 100 to 5.

The number of calibration cycles has been increased. It is the main criterion for estimating the launch of an oscillator. A large increase leads to an increase in the load time, as well as the stability of recognition of this case. (in Kconfig).
Changed from 1024 to 3000.
2018-05-15 08:59:15 +05:00
Konstantin Kondrashov
8f80cc733d soc: Change DPORT access
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.

The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
2018-05-14 17:54:57 +05:00
jack
c384fa2492 rename clock enable and reset bits for SPI modules
1.The names of clock enable and reset bits do not match with TRM, just rename them.
2018-05-14 16:45:03 +08:00
Jiang Jiang Jian
db90f49758 Merge branch 'bugfix/update_emac_h' into 'master'
update emac_reg_v2.h

See merge request idf/esp-idf!2050
2018-05-07 16:16:52 +08:00
Angus Gratton
1cb5712463 cmake: Add component dependency support
Components should set the COMPONENT_REQUIRES & COMPONENT_PRIVATE_REQUIRES variables to define their
requirements.
2018-04-30 09:59:20 +10:00
Angus Gratton
c671a0c3eb build system: Initial cmake support, work in progress 2018-04-30 09:59:20 +10:00
Ivan Grokhotkov
94250e42a0 sleep: optimize light sleep wakeup latency 2018-04-26 19:36:47 +08:00
Ivan Grokhotkov
ac623a9756 soc/rtc: restore dbg attenuation when waking from sleep
This fixes inability to enter deep sleep after waking up from light sleep
2018-04-26 18:52:46 +08:00
Ivan Grokhotkov
d38b22b11b soc/rtc, sleep: don’t lower the bias for wakeup state
This fixes watchdog resets occurring during wakeup from light sleep.
2018-04-26 18:52:45 +08:00
Ivan Grokhotkov
b0a91630fb soc/rtc: allow main XTAL to be powered on in sleep 2018-04-26 18:52:45 +08:00
Ivan Grokhotkov
3c78faa0a9 soc/rtc: don’t switch frequency in rtc_sleep_init 2018-04-26 18:52:45 +08:00
shangke
5fc130f2c0 update emac_reg_v2.h 2018-04-25 14:54:09 +08:00
Ivan Grokhotkov
52f9a5ca16 Merge branch 'bugfix/sdspi_wp_cd_pins' into 'master'
sdmmc, sdspi: fix handling of CD and WP

See merge request idf/esp-idf!2285
2018-04-24 20:53:47 +08:00
Ivan Grokhotkov
85ab4fc83e sdmmc host: add handling of CD and WP pins
Previous version of the code only connected CD and WP to the
peripheral, in fact the hardware does not use the values of these
signals automatically. This adds code to read CD and WP values when
command is executed and return errors if card is not present, or
write command is executed when WP signal is active.
2018-04-24 19:08:44 +08:00
Ivan Grokhotkov
9c7207ed3c Merge branch 'bugfix/soc_clk_out_fields' into 'master'
soc/io_mux: make CLK_OUT fields compatible with REG_SET/GET_FIELD

See merge request idf/esp-idf!2133
2018-04-13 19:42:20 +08:00
Ivan Grokhotkov
ee600784c5 sdmmc: add SDIO support
- Add SDIO support at protocol layer (probing, data transfer, interrupts)
- Add SDIO interrupts support in SDMMC host
- Add test (communicate with ESP32 in SDIO download mode)
2018-04-11 11:07:13 +08:00
Ivan Grokhotkov
2522c1b2f9 Merge branch 'bugfix/rtc_clk_fixes' into 'master'
Power management and RTC fixes

See merge request idf/esp-idf!2131
2018-04-10 18:17:02 +08:00
Angus Gratton
53234ef2bc Merge branch 'refactor/rtc_split_module' into 'master'
bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion.

See merge request idf/esp-idf!1848
2018-04-04 09:00:58 +08:00
Angus Gratton
da27816314 Merge branch 'feat/add_efuse_cpu_freq_rating' into 'master'
efuse/add cpu freq rating

See merge request idf/esp-idf!1994
2018-03-29 05:59:52 +08:00
Michael (Xiao Xufeng)
cef8baf424 bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion.
refactor structure of ``rtc_module.c`` to make it more clearly.

Closes https://github.com/espressif/esp-idf/issues/1517
2018-03-28 17:10:01 +08:00
Ivan Grokhotkov
b007b89b84 soc/io_mux: make CLK_OUT fields compatible with REG_SET/GET_FIELD 2018-03-27 12:10:18 +08:00
Ivan Grokhotkov
43b5fdd5c9 soc/rtc: fix switching between 80/160 and 240MHz
Previous code contained a check for PLL frequency to be 240MHz, while
in fact 240MHz was a CPU frequency; corresponding PLL frequency is
480MHz. Fixed the comparison and replaced integer MHz values with an
enum.
2018-03-27 10:55:59 +08:00
Ivan Grokhotkov
48d55e22e7 soc/rtc: run 32k XTAL startup test only in PSRAM config
PSRAM tests run on ESP-WROVER-KIT boards, which have the 32k XTAL
installed.
2018-03-26 10:14:13 +08:00
Ivan Grokhotkov
887b6e2925 Merge branch 'bugfix/rtc_clk_32k_bootstrap' into 'master'
bugfix/rtc_clk_32k_bootstrap: Fix starting 32k RTC

See merge request idf/esp-idf!2085
2018-03-21 18:38:49 +08:00
Konstantin Kondrashov
f7df532ec0 bugfix/rtc_clk_32k_bootstrap: Fix starting 32k RTC
1. External 32kHz crystal is started for too long or it may not start at all. It is often observed at the first start.
2. At the first start, it is possible that the crystal did not start. And the recorded period was recorded as 0. Which led to a division error by zero during the transition to the deep sleep mode (Maybe somewhere else).
3. Added a unit test to test a new method of oscillation an external crystal.
4. Added a new method of oscillating of an external crystal. The legs of the crystal are fed with a 32 kHz frequency.

The new method eliminates these errors.

Added unit test: `\esp-idf\components\soc\esp32\test\test_rtc_clk.c`: `make TEST_COMPONENTS=soc`
- 8 Test starting external RTC crystal. Will pass.

`Bootstrap cycles for external 32kHz crystal` - is specified in the file Kconfig by default 100.

QA tested a new method of oscillation the crystal on 25 boards. The supply of square waves on the crystal showed a 100% result in contrast to the previous method of launching the crystal. After the tests, the old method was deleted.

Closes TW19143
2018-03-21 13:27:56 +05:00
Ivan Grokhotkov
1618dbc9a5 soc/rtc: wait for frequency switch to complete
The fast path of CPU frequency switch function, used in DFS, was not
waiting for the frequency switch to complete when switching from XTAL
to PLL. This resulted in incorrect reads from peripherals on APB,
where two consecutive reads could return the same value. For example,
in esp_timer, read of FRC_COUNT_REG would return same value as the
preceding read of FRC_ALARM_REG, causing time to jump by the value of
FRC_ALARM_REG / apb_freq_mhz.
2018-03-20 18:27:32 +08:00
Darian Leung
8b1277c55f efuse/add cpu freq rating
This commit adds support for CPU max freqeuency rating
bits in CPU. Bootloader will now print an error if attempting
to 160MHz rated ESP32 at 240MHz.

EFUSE_CHIP_VER_RESERVE has been replaced by the
frequency rating bits. Dependancies on EFUSE_CHIP_VER_RESERVE
have been changed to use EFUSE_CHIP_VER_PKG
2018-03-07 12:16:51 +08:00
Darian Leung
0c9e2c0fba esp_adc_cal/Remove lookup table
This commit removes the lookup table mode due to inferior performance when compared
to linear mode under attenuation 0, 1 and 2. However small portions of the lookup table
are kept for the higher voltages of atten 3 (above ADC reading 2880). That voltage range
in atten 3 has non linear characteristics making the LUT performan better than linear mode.
2018-02-22 20:01:41 +08:00
Darian Leung
73cdfbfe79 esp_adc_cal/Add eFuse functionality
This commit updates the esp_adc_cal ocmponent to support new calibration methods
which utilize calibratoin values stored in eFuse. This commit includes LUT mode
2018-02-13 21:22:48 +08:00
Ivan Grokhotkov
e381c6adde Merge branch 'bugfix/fix_i2s_adc_mode' into 'master'
driver(i2s): fix broken i2s adc mode

See merge request idf/esp-idf!1653
2018-02-11 12:58:58 +08:00
Wangjialin
451f69cc2e driver(i2s): fix broken i2s adc mode
1. Move i2s reset code from i2s_stop to i2s_start.
2. add RTC API to set sw mode for ADC
3. add description for adc_power_always_on()
4. add lock for i2s dma and RTC ADC functions.
5. add ADC read task in example

reported from bbs:  https://esp32.com/viewtopic.php?f=13&t=3490&p=17522#p17522
reported from github: https://github.com/espressif/esp-idf/issues/1333
2018-02-07 17:17:20 +08:00
Jeroen Domburg
70ab924dbb Especially when internal memory fills up, some FreeRTOS structures (queues etc) get allocated in psram. These structures also contain a spinlock, which needs an atomic-compare-swap operation to work. The psram hardware, however, does not support this operation. As a workaround, this patch detects these spinlocks and will, instead of S32C1I, use equivalent C-code to simulate the behaviour, with an (internal) mux for atomicity. 2018-02-02 17:11:06 +08:00
Angus Gratton
4297c337f9 esp32: Add IO_MUX_GPIOxx register names to match iomux names used in TRM
The TRM describes IOMUX registers are IO_MUX_x_REG for x in GPIO0-39.

Until now ESP-IDF describes them as PERIPHS_IO_MUX_(pinname)_U

This commit adds additional IOMUX register names which match the ones used in the TRM.
2018-01-30 17:09:37 +08:00
Ivan Grokhotkov
ffaf145056 Merge branch 'bugfix/xtal_freq_estimation' into 'master'
soc/rtc_clk: fix loss of precision in estimation of XTAL frequency

See merge request !1763
2018-01-23 15:37:47 +08:00
kooho
492db0591d Fix uart fifo overflow bug 2018-01-12 14:42:54 +08:00
Ivan Grokhotkov
914ab07567 Merge branch 'feature/ulp_i2c_reg' into 'master'
soc,ulp: add register definitions of RTC_I2C peripheral

See merge request !1762
2018-01-11 12:08:25 +08:00
Deng Xin
337f790fd3 bug fix of assert happen in PSRAM 2018-01-09 20:01:06 +08:00
Ivan Grokhotkov
7c584e80b0 soc/rtc_clk: fix loss of precision in estimation of XTAL frequency
RTC_FAST_CLK_FREQ_APPROX is defined as 8500000, so 0.5MHz part was lost
when dividing by MHZ. Since cal_val is 64-bit the parens can be removed.

With 40MHz XTAL for a nominal ESP32 chip, this fixes estimated XTAL
frequency from 38 to 40MHz.
2018-01-08 23:31:21 +08:00
Ivan Grokhotkov
dba291416f soc,ulp: add register definitions of RTC_I2C peripheral 2018-01-08 21:28:14 +08:00
Angus Gratton
c69af42b96 esp32: Fix backwards compatibility for pre-v2.1 bootloaders
Older bootloaders don't set RTC_XTAL_FREQ_REG or call rtc_clk_init(),
app needs to pick this up.

Reported at
https://esp32.com/viewtopic.php?f=2&t=3939&p=17836
2017-12-18 13:45:57 +11:00
Ivan Grokhotkov
a99483a727 docs: add information about execution time of ULP instructions 2017-12-11 14:05:41 +08:00
Ivan Grokhotkov
ca751648fa ulp: document the need to wait for RTC to be ready for wakeup 2017-12-11 12:11:46 +08:00
krzychb
421592a8eb LEDC Driver: Added back original definitions of 'duty_resolution' and 'clock_divider'. This update is to provide backward compatibility with ESP-IDF 2.1. 2017-12-04 21:12:56 +01:00
Jiang Jiang Jian
c672fc54fd Merge branch 'feature/ledc_more_meaningful_parameter_names' into 'master'
Provided more meaningful parameter names by renaming 'bit_num' to 'duty_resoluti…

See merge request !1440
2017-12-01 19:33:53 +08:00
Vitor Massaru Iha
cf768380b1 soc: Remove redefinition of MCU_SEL_M
Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>

Merges #1290
2017-11-22 11:01:42 +08:00
Ivan Grokhotkov
3369f15fa3 soc/rtc: don't power down BIAS_I2C along with APLL if other PLL is used
If enable == false, and SOC_CLK_SEL == PLL, the code would would
erroneously set RTC_CNTL_BIAS_I2C_FORCE_PD. This change fixes the logic.
2017-11-20 15:27:16 +08:00
krzychb
d488bb7bac Provided more meaningful parameter names by renaming 'bit_num' to 'duty_resolution' and 'div_num' to 'clock_divider' 2017-11-15 08:08:12 +01:00
Ivan Grokhotkov
f22c681c1c soc/rtc: raise core voltage when 80MHz flash frequency is used
To achieve reliable operation with GD flash at 80MHz, need to raise
core voltage.
This causes the following current consumption increase:

At 80MHz: from 29mA to 33mA
At 160MHz: from 41mA to 47mA

Test conditions: 2 cores running code from IRAM, remaining peripherals
clock gated.
2017-11-08 21:13:02 +08:00
Jiang Jiang Jian
abacf8d2a0 Merge branch 'bugfix/rtc_and_restart_fixes' into 'master'
rtc_clk and esp_restart fixes

See merge request !1458
2017-11-04 01:34:38 +08:00
Ivan Grokhotkov
a02b30ccda efuse: add package definitions for PICOD2/D4 2017-11-03 15:49:10 +08:00
Ivan Grokhotkov
fb9c106bcb soc/rtc: add function to get/set VDDSDIO configuration
Also consider case of VDDSDIO force powered on in rtc_sleep.
2017-11-03 15:49:09 +08:00