Commit Graph

2 Commits

Author SHA1 Message Date
Omar Chebib
b03c8912c7 Xtensa: fix a bug that altered CPU registers in FPU exception handlers
* Fixes https://github.com/espressif/esp-idf/issues/11690
2023-07-04 02:45:56 +00:00
Darian Leung
b2c074bb70 xtensa: Move Xtensa RTOS porting layer files to xtensa component
When porting an RTOS to the Xtensa architecture, there are a few files that
are common to all Xtensa RTOS ports. These files form the Xtensa RTOS porting
layer (e.g., "xtensa_vectors.S", "xtensa_context.S"). An Xtensa RTOS port is
expected to provide an RTOS specific "xtensa_rtos.h" header to interface with
the Xtensa RTOS porting layer.

Previously, the Xtensa RTOS porting layer files were placed in the FreeRTOS
component. This commit does the following:

1. Moves the Xtensa RTOS porting layer files from the `freertos` component to
the `xtensa` component. The following files were moved:

    - xtensa_asm_utils.h
    - xtensa_context.S
    - xtensa_loadstore_handler.S
    - xtensa_vectors.S

2. Refactored xtensa component include paths to separate Xtensa RTOS porting
layer headers.

- Xtensa HAL headers included via `#include <xtensa/...h>`
- Xtensa RTOS porting layer headers included via `#include <...h>`

Note: The xtensa files in the Amazon SMP FreeRTOS port are not moved/deleted in
this commit to ensure the moved files retain a clean diff history.
2023-04-18 15:28:05 +08:00