Jakob Hasse
aca9ec28b3
NVS: using esp_partition API
...
* partition api changed from spi_flash* API to
esp_partition* API and is abstracted as a C++
interface.
* The old nvs encryption is still possible
* changed default unit test app partition table
* Partitions coming from esp_partition API are
checked for generic flash encryption. If yes,
an error is returned since generic flash
encryption isn't compatible with nvs
encryption
* esp32, esp32s2 tests don't require nvs_flash
but mbedtls now
Closes IDF-1340
Closes IDF-858
2020-09-14 10:34:34 +08:00
Jakob Hasse
20c068ef3b
cmock: added cmock as component
...
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
morris
4dd649d533
unit_test:refactor ref clock to use RMT carrier
2020-08-31 14:25:23 +08:00
Armando
da9649df53
spi: fix issue with closing DMA before CPU reset
2020-08-17 21:32:20 +08:00
Renz Bagaporo
b30522f701
esp32, esp32s2: move sleep modes code to esp_system
2020-08-17 19:09:23 +08:00
Renz Bagaporo
5785e4dfb6
newlib: move some functions to soc, esp32, esp32s2
2020-08-10 15:11:38 +08:00
morris
b30bd7a2ef
esp32s2: add CP_DMA driver
2020-08-04 15:28:32 +08:00
Angus Gratton
a2dc60b254
Merge branch 'feature/secure_boot_esp32s2' into 'master'
...
Feature/secure boot esp32s2
See merge request espressif/esp-idf!8254
2020-07-28 16:39:34 +08:00
Ivan Grokhotkov
16c73edc67
Merge branch 'refactor/add_alias_name_for_ets_common_api' into 'master'
...
esp_rom: extract common ets apis into esp_rom_sys.h
See merge request espressif/esp-idf!9701
2020-07-28 15:04:55 +08:00
morris
2917651478
esp_rom: extract common ets apis into esp_rom_sys.h
2020-07-27 15:27:01 +08:00
Angus Gratton
abdb657926
bootloader esp32s2: Increase bootloader DRAM & IRAM allowance
...
Bootloader DRAM now ends at 0x3FFEAB00 which is the start of ROM
static RAM (reclaimable after app is running).
IRAM loader segment increased by 8KB.
Available total static RAM for the app is now reduced by 16KB.
2020-07-27 00:01:10 +00:00
Renz Bagaporo
837052c86f
esp_system: restore deleted no stack check flag
...
Restores the change of startup refactor changes removed the no stack
check protection flag when compiling the source file that contains
execution of constructors - which contains function to setup stack
guard. Restore that and update the source file, since this is in the 2nd
stage of the startup now.
Closes https://github.com/espressif/esp-idf/issues/5617
2020-07-22 11:57:18 +08:00
Angus Gratton
442736c5d6
Merge branch 'refactor/common_rom_uart_apis' into 'master'
...
esp_rom: extract common uart apis into esp_rom_uart.h
See merge request espressif/esp-idf!9313
2020-07-21 15:24:21 +08:00
Angus Gratton
3755fb6597
Merge branch 'feature/add_esp32s3_bootloader_ld_file' into 'master'
...
move part of esp32-s3 codes to master (bootloader linker, esp32s3 empty componnet)
See merge request espressif/esp-idf!9608
2020-07-21 14:51:04 +08:00
Angus Gratton
a2eed7cba6
esp32s2: Always use eFuse config for WP pin
...
No reason to override just this pin in software.
2020-07-20 14:08:49 +08:00
chenjianqiang
bff6b5b70e
bugfix(psram): configure MMU after PSRAM initialization
2020-07-20 12:21:32 +08:00
morris
d066c3ab2c
esp_system: add panic high interrupt handler for esp32s3
2020-07-20 11:15:24 +08:00
morris
6316e6eba2
esp_system: add CONFIG_ESP_SYSTEM_RTC_EXT_CRYS
2020-07-20 11:15:24 +08:00
morris
204cb341b1
esp32s3: initial empty component
2020-07-20 10:51:05 +08:00
Angus Gratton
f83a61e2c8
Merge branch 'feature/ulp_riscv' into 'master'
...
feature/components: Initial support for ULP-RISC-V Coprocessor on esp32s2
Closes IDF-521
See merge request espressif/esp-idf!8781
2020-07-20 08:27:20 +08:00
morris
345606e7f3
esp_rom: extract common uart apis into esp_rom_uart.h
2020-07-17 16:00:59 +08:00
Felipe Neves
b6dba84323
ulp: added support to building code for riscv ULP coprocessor
2020-07-15 15:28:49 -03:00
morris
458b14a8ea
esp_rom: extract common efuse apis into esp_rom_efuse.h
2020-07-15 10:40:50 +08:00
Angus Gratton
4a0a331122
Merge branch 'bugfix/esp32s2_return_use_fixed_static_ram_size_option' into 'master'
...
esp32s2: Add USE_FIXED_STATIC_RAM_SIZE feature
Closes IDF-1800
See merge request espressif/esp-idf!9033
2020-07-14 13:14:07 +08:00
Jiang Jiang Jian
64673b45e5
Merge branch 'bugfix/esp32s2_cache_unsupport_config' into 'master'
...
esp32s2: remove unsupported cache option
Closes IDFGH-3414
See merge request espressif/esp-idf!9300
2020-07-12 21:33:56 +08:00
Wang Lei
6b12ac0968
esp32s2: remove unsupported cache option
2020-07-12 21:33:55 +08:00
Shubham Kulkarni
d4ce5de16e
Include header file soc/cpu.h in memprot.c and system_api.c
...
This fixes build issues with Vanilla FreeRTOS
2020-07-10 13:56:42 +05:30
morris
a4d0033c03
esp_rom: extract common GPIO apis into esp_rom_gpio.h
2020-07-07 11:40:19 +08:00
Mahavir Jain
e62cb2be68
esp32s2: remove bt references from esp32s2 ld script
2020-07-02 03:45:05 +00:00
Darian Leung
97721d469c
TWAI: Add ESP32-S2 support
...
This commit adds TWAI driver support for the
ESP32-S2. The following features were added:
- Expanded BRP support
- Expanded CLKOUT Divider Support
- Updated example READMEs
2020-06-30 16:56:03 +08:00
Ivan Grokhotkov
84833bf0df
Merge branch 'feature/light_sleep_reject' into 'master'
...
sleep: enable sleep reject when entering light sleep
Closes IDF-1678 and WIFI-1185
See merge request espressif/esp-idf!9242
2020-06-29 15:57:49 +08:00
Ivan Grokhotkov
e94848556b
esp32, esp32s2: update console initialization
2020-06-26 15:38:49 +02:00
Ivan Grokhotkov
4e30e8801c
sleep: enable sleep reject when entering light sleep
2020-06-24 15:45:42 +00:00
Michael (XIAO Xufeng)
6b337049fb
spiram: fix the read id failure
...
The issue is caused by:
1. The disable_qio_mode inside read_id may have side effects.
2. read_id twice may have side effects.
Fix this issue by moving disable_qio_mode out of read_id and only do it
once before read_id. And retry read_id only when the first one is
failed.
Issue introduced in 3ecbb59c15
.
2020-06-23 11:18:20 +08:00
Renz Bagaporo
08cbfa6187
esp_system: fix various review issues
2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
67983d5c1c
esp_system: restore order of some init functions
2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
20d17e648b
esp32, esp32s2: remove dependency of cache err int init on freertos
2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
0f43a2620d
esp_system: component init functions macro
...
Allows components to declare initialization function, such that the
startup code does not have direct dependency on the component.
2020-06-19 18:40:09 +10:00
Renz Bagaporo
bb5535ca5d
esp32, esp32s2: move startup code into esp_system
2020-06-19 18:40:09 +10:00
Renz Christian Bagaporo
62ef63e835
esp32, esp32s2: move clk init functions to esp_system
2020-06-19 18:40:09 +10:00
Angus Gratton
91d8c26349
Merge branch 'bugfix/fix_16mbit_psram_id_read_error' into 'master'
...
psram: fix 16mbit psram id read error
See merge request espressif/esp-idf!9083
2020-06-19 11:49:26 +08:00
KonstantinKondrashov
96b3ab708a
esp32s2: Add USE_FIXED_STATIC_RAM_SIZE feature
...
This feature exists on ESP32 and missed for ESP32S2. This commit adds it for esp32s2 as well.
Closes: IDF-1800
2020-06-17 22:24:51 +08:00
Ivan Grokhotkov
314d08e53f
esp32s2: sleep_modes: remove dependency on driver/uart.h
2020-06-16 18:31:46 +02:00
Ivan Grokhotkov
5b291c032a
esp32s2: suspend UART output using XOFF before entering light sleep
...
Same logic as for the ESP32, except two changes:
* need to set UART_SW_FLOW_CON_EN bit for UART_FORCE_XOFF to take
effect
* need to check if the peripheral is not clockgated and out of reset
2020-06-16 18:13:14 +02:00
Angus Gratton
a5683f2263
Merge branch 'bugfix/efuse_logs' into 'master'
...
esp32/esp32s2: Reduce using ESP_EARLY_LOGx and move some code after the stdout initialization in startup code
Closes IDFGH-3367
See merge request espressif/esp-idf!8904
2020-06-16 13:47:02 +08:00
Krzysztof Budzynski
79a0e892a0
Merge branch 'feature/coredump_allow_variable_dumping' into 'master'
...
Added coredump user defined variable into coredump
Closes IDF-44
See merge request espressif/esp-idf!8730
2020-06-15 02:35:38 +08:00
Alexey Gerenkov
1deeadf4c5
Added coredump user defined variable into coredump
2020-06-15 02:35:38 +08:00
Angus Gratton
e29c9d331f
Merge branch 'bugfix/esp32s2_define_correct_size_for_rtc_fast_mem' into 'master'
...
esp32s2: Fix missed features CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP and...
Closes IDF-1800
See merge request espressif/esp-idf!9031
2020-06-10 16:04:41 +08:00
chenjianqiang
3ecbb59c15
psram: fix 16mbit psram id read error
2020-06-05 21:06:21 +08:00
Angus Gratton
8b692c85f1
Merge branch 'test/move_rom_unit_test' into 'master'
...
move rom unit test && enable intr_alloc test on esp32s2
See merge request espressif/esp-idf!8263
2020-06-04 16:47:25 +08:00
Jakob Hasse
516680a4ff
Doc: DS documentation for S2
2020-06-04 10:49:22 +08:00
morris
2ccdd7eb10
intr_alloc: using isr version of critical section
2020-06-03 13:16:13 +08:00
morris
d70961ad58
esp32s2: add more unit test for esp32s2
...
Most of the test cases are copied from esp32
add int_alloc test
add delay test
add random test
2020-06-03 13:16:13 +08:00
morris
783779c870
esp_rom: move rom api test into esp_rom component
2020-06-03 13:16:13 +08:00
KonstantinKondrashov
4d66c384a4
esp32s2: Fix missed features CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP and CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
...
Defines the correct size for RTC fast memory (the same as for ESP32).
Closes: IDF-1800
2020-06-02 22:55:56 +08:00
KonstantinKondrashov
0b62b28e25
esp32s2: Move some code after the stdout initialization
2020-06-01 20:46:21 +08:00
Angus Gratton
baedfab382
Merge branch 'feature/dis_uart_dl_mode' into 'master'
...
feature: Disable UART download mode
Closes IDF-1386
See merge request espressif/esp-idf!8590
2020-05-29 14:09:54 +08:00
Angus Gratton
59f29cbca8
Merge branch 'feature/allow_rtc_memory_for_task_stacks' into 'master'
...
Add RTC Fast Memory to Dynamic Memory Pool
See merge request espressif/esp-idf!8390
2020-05-29 14:07:01 +08:00
Angus Gratton
f64ae4fa99
efuse: Add 'disable Download Mode' & ESP32-S2 'Secure Download Mode' functionality
2020-05-28 17:50:45 +10:00
jiangguangming
b25ccde45f
flash mmap: fix bug for cache2phys and phys2cache on esp32s2
2020-05-26 15:14:23 +08:00
Angus Gratton
084e170a8f
Merge branch 'refactor/esp_ipc' into 'master'
...
Split esp_ipc to a seaparate component
Closes IDF-1295
See merge request espressif/esp-idf!8520
2020-05-25 15:03:04 +08:00
Ivan Grokhotkov
948580d1a2
Merge branch 'gdb/bt_on_invalid_pc' into 'master'
...
gdb: Modify PC in case of invalid PC
See merge request espressif/esp-idf!8391
2020-05-19 16:44:07 +08:00
Darian Leung
11d96b39d0
esp_ipc: Move to new component
...
This commit moves esp_ipc into a separate component.
2020-05-18 16:51:45 +08:00
Mahavir Jain
18c1838587
esp32s2: add config option to place RTC data in fast RAM
2020-05-14 13:12:26 +00:00
Mahavir Jain
1aac284dda
heap: add rtc fast memory region to dynamic pool
...
- for ESP32 only enabled in case of unicore config
- capability wise this region (8K) is same as DRAM, except non-DMA capable
- also fixed small issue in reserved memory region processing when (start == end)
2020-05-14 13:12:26 +00:00
Xia Xiaotian
526a3e49ed
esp_wifi: When WiFi TSF is active, skip light sleep
...
* Add an API for peripherals to set callbacks to skip light sleep
* Make WiFi power save example work
2020-05-13 19:31:36 +08:00
Michael (XIAO Xufeng)
f7ec57b615
Merge branch 'feature/usb_wrap_headers' into 'master'
...
usb: add usb_wrap headers, move some code from LL to HAL
See merge request espressif/esp-idf!8395
2020-05-10 19:19:14 +08:00
Sachin Parekh
46d914ff45
gdb: Modify PC in case of invalid PC
...
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
2020-05-08 18:34:52 +05:30
Ivan Grokhotkov
66889a7a58
esp32s2: return correct CPU number in esp_cache_err_get_cpuid
2020-05-04 10:13:14 +00:00
Angus Gratton
d013105256
Merge branch 'feature/twdt_prints_backtrace' into 'master'
...
Add Task Watchdog backtrace printing
Closes IDF-1072
See merge request espressif/esp-idf!8136
2020-05-04 14:58:53 +08:00
Angus Gratton
158ab5a9b9
Remove "disable ROM BASIC boot mode" from ESP32-S2
...
Feature removed from ESP32-S2 ROM (was present in S2 Beta ROM)
2020-05-01 16:16:47 +10:00
Ivan Grokhotkov
897e69cc9d
soc, esp32s2: add usb_wrap peripheral
2020-04-29 10:04:13 +02:00
Darian Leung
b097dd0a79
Add Task Watchdog backtrace printing
...
This commit makes the Task Watchdog print the backtrace of both
cores when it times out.
2020-04-27 18:11:29 +00:00
Jakob Hasse
2da7e65646
Doc: S2 HMAC documentation
2020-04-27 12:25:46 +08:00
Ivan Grokhotkov
275ed32a11
Merge branch 'feature/esp32s2_iram_dram_protection' into 'master'
...
esp32s2: IRAM/DRAM memory protection
See merge request espressif/esp-idf!8156
2020-04-23 21:52:54 +08:00
Martin Vychodil
7491ea677a
esp32s2: IRAM/DRAM memory protection
...
* new mem_prot API
* mem_prot on & locked by default (see Kconfig)
* feature activated in start_cpu0_default()
JIRA IDF-1355
2020-04-21 15:10:58 +02:00
Ivan Grokhotkov
9003c01b4b
Merge branch 'init_priority_fix' into 'master'
...
CXX: make __attribute__((init_priority(n))) work
See merge request espressif/esp-idf!8276
2020-04-17 17:56:10 +08:00
Angus Gratton
433c1c9ee1
Merge branch 'bugfix/ds_mpi_lock' into 'master'
...
crypto: DS uses RSA peripheral, added shared lock
See merge request espressif/esp-idf!8274
2020-04-15 15:15:25 +08:00
Wang Jia Lin
b3d8b6a250
Merge branch 'bugfix/fix_esp32s2_soc_bug' into 'master'
...
RTC regulator & voltage calibration fixes
See merge request espressif/esp-idf!8137
2020-04-10 14:25:41 +08:00
Chai Ji’e
dac17709ec
RTC regulator & voltage calibration fixes
2020-04-10 14:25:40 +08:00
Marius Vikhammer
a2a204c2b9
crypto: DS uses RSA peripheral, added shared lock
2020-04-09 11:11:04 +00:00
Jakob Hasse
4943b1cbf0
CXX: make __attribute__((init_priority(n))) work
...
* Added corresponding test case
* Moved all C++ init tests to separate file
Closes https://github.com/espressif/esp-idf/issues/5038
2020-04-08 09:11:54 +08:00
Marius Vikhammer
0a41bd3833
esp32s2 sha test: update "Test esp_sha" to use cache compensated timer for performance measuring
2020-04-06 06:37:28 +00:00
Jakob Hasse
0b02e5358e
Digital Signature HW: adding S2 support
2020-04-01 13:47:13 +08:00
KonstantinKondrashov
df2ea2527f
esp32s2: Add a Kconfig option- Number of attempts to repeat 32k XTAL calibration
2020-03-27 04:56:44 +00:00
Jakob Hasse
ea47bbb118
HMAC: adding upstream message support
2020-03-26 19:00:27 +08:00
Michael (XIAO Xufeng)
42c552242b
Merge branch 'feature/fix_touch_driver_for_esp32s2' into 'master'
...
driver(touch): fix touch sensor driver for esp32s2
See merge request espressif/esp-idf!7664
2020-03-26 09:50:42 +08:00
Darian Leung
91841a53ff
WDT: Add LL and HAL for watchdog timers
...
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:
- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
startup code to use the HAL layer.
2020-03-26 02:14:02 +08:00
fuzhibo
340563f479
Driver(touch): fix touch sensor driver for esp32s2.
...
1.update touch sensor driver for esp32s2;
2.update unit test for touch sensor;
3.update register files about touch sensor;
2020-03-25 22:45:57 +08:00
Angus Gratton
62426a6c90
Merge branch 'refactor/use_new_component_registration_functions' into 'master'
...
CMake: Use new component registration function
See merge request espressif/esp-idf!8068
2020-03-25 08:02:42 +08:00
Renz Bagaporo
3d0967a58a
test: declare requirements and include dirs private
2020-03-23 10:58:50 +08:00
Ivan Grokhotkov
18bc25b3a6
cpu_start: handle CONFIG_VFS_SUPPORT_IO
2020-03-20 14:03:45 +01:00
Wang Jia Lin
47253a827a
Merge branch 'bugfix/esp32s2_support_16Mbit_psram' into 'master'
...
bugfix(psram): add 16Mbit psram support for esp32s2
See merge request espressif/esp-idf!8011
2020-03-20 00:22:49 +08:00
Angus Gratton
207914a13a
Merge branch 'refactor/common_code_panic_handler' into 'master'
...
Panic handling common code refactor
See merge request espressif/esp-idf!7489
2020-03-19 11:23:57 +08:00
chenjianqiang
140e0390cc
psram: add psram size auto detect for esp32s2
2020-03-19 10:53:47 +08:00
chenjianqiang
42154848cc
psram: add 16Mbit psram support for esp32s2
2020-03-18 11:15:00 +08:00
Angus Gratton
59381b60c0
Merge branch 'refactor/hal_function_set_exception_vector_table' into 'master'
...
soc: add hal api to set exception vector table base address
See merge request espressif/esp-idf!7905
2020-03-11 14:44:42 +08:00
Renz Bagaporo
890510aecd
esp32, esp32s2: move reset reason source to esp_system
2020-03-10 19:56:24 +08:00
Renz Christian Bagaporo
2b100789b7
esp32, esp32s2: move panic handling code to new component
2020-03-10 19:56:24 +08:00
morris
8b6c0947c7
soc: add hal api to set exception vector table base address
2020-03-06 20:23:30 +08:00
morris
f735b8891e
esp32s2: print app description on startup
2020-03-06 15:24:28 +08:00
Renz Bagaporo
71c02394e5
esp32s2: remove esp_intr.h header
2020-03-05 16:15:59 +08:00
Renz Christian Bagaporo
7386ac6d15
esp32s2: remove calls to stall/unstall other core
2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
cefc71cdcd
bootloader_support: mem-related initializations using cpu abstractions
2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2
soc: create abstraction for cpu related operations
2020-02-27 07:14:19 +05:00
Ivan Grokhotkov
cee7377e3c
esp32s2: hide “FPGA” as an option for CPU frequency
...
unless IDF_ENV_FPGA is set.
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
a8ad9d6b43
esp32s2: use smaller RTC_CLK_CAL_CYCLES by default
...
Reduce the number proportionally to the frequency (160k on ESP32,
90k on ESP32-S2).
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
490bf29767
esp32s2: fix enabling 32k XTAL clock
...
On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.
fix clock choices
update rtc 32k xtal code for s2
missed api in rtc.h
bootloader_clock: update for S2
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
74ac618287
soc/rtc: update frequency switching APIs to match the master branch
...
esp32s2 code was based in IDF v3.1, and used outdated APIs.
Closes IDF-670
2020-02-17 17:23:32 +01:00
Ivan Grokhotkov
d2d3269159
esp32s2: sync esp_pm code from esp32
2020-02-17 16:03:47 +01:00
Jiang Jiang Jian
54a50f4532
Merge branch 'feature/support_esp32s2_wifi_v2' into 'master'
...
WiFi: Add support for ESP32S2
See merge request espressif/esp-idf!7505
2020-02-14 11:54:13 +08:00
Renz Christian Bagaporo
16e0c93e40
ci: solve public headers errors
2020-02-11 14:30:42 +05:00
Andrei Gramakov
4e8b4b9e49
soc: add USB peripheral register definitions, hal level, reg map, etc
2020-02-10 08:33:39 +00:00
Konstantin Kondrashov
daa9c30c8e
rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c
2020-02-09 20:03:31 +08:00
Angus Gratton
11fac8637a
docs: Resolve doxygen & Sphinx warnings
2020-02-07 16:37:45 +11:00
Sagar Bijwe
4f93a707f8
WiFi: Add support for ESP32S2
...
1) Update WiFi and PHY libs for ESP32S2.
2) Remove KConfig options ESP32S2 PHY lib selection.
3) Change target macros from ESP32S2BETA to ESP32S2
2020-02-06 14:19:30 +05:30
Konstantin Kondrashov
739eb05bb9
esp32: add implementation of esp_timer based on TG0 LAC timer
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Closes: IDF-979
2020-02-06 14:00:18 +08:00
Ivan Grokhotkov
50466a5e4f
Merge branch 'bugfix/esp32s2_ldscripts' into 'master'
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esp32s2: LD script fixes/improvements and re-enable SystemView examples
Closes IDF-1357, IDF-1354, and IDF-1346
See merge request espressif/esp-idf!7431
2020-02-05 02:09:29 +08:00
Ivan Grokhotkov
41631587f8
Merge branch 'feature/esp32s2_brownout' into 'master'
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esp32s2: add brownout detector support
Closes IDF-751
See merge request espressif/esp-idf!7428
2020-02-04 17:00:46 +08:00
Felipe Neves
429712c6eb
freertos: moved all xtensa specific files into a separated folder
2020-01-27 16:05:30 -03:00
Ivan Grokhotkov
bb59ca3ab3
esp32s2: add missing ESP32S2_MEMMAP_TRACEMEM_TWOBANKS option
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It is used when app-trace is enabled, to provide ping-pong buffers.
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
02a99e84c8
esp32s2: move trace memory reservation to soc_memory_layout.c
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
110f3c9ff5
esp32s2: put static .data and .bss directly after .iram.text
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This results in a single large heap section instead of two smaller
ones.
Closes IDF-1354
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
27bff3517f
esp32s2: fix "loadable ELF" build
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Closes IDF-1346
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
caef7ad9f2
esp32, esp32s2beta: move brownout.c to esp_common
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
70752baba4
esp32s2: add brownout detector support
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1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
cbb84e8f5e
esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests
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1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.
2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.
Full explanation of the calculation below.
Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).
At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:
THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)
The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to
THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).
The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.
Closes IDF-1239
2020-01-23 11:29:22 +01:00
morris
e30cd361a8
global: rename esp32s2beta to esp32s2
2020-01-22 12:14:38 +08:00