Angus Gratton
fd164b82b6
Merge branch 'refactor/move_from_xtensa' into 'master'
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Movements from xtensa
Closes IDF-2164
See merge request espressif/esp-idf!10556
2021-03-11 00:24:25 +00:00
Angus Gratton
3ddfe1e8ac
Merge branch 'bugfix/asserts_disabled' into 'master'
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core: Fix assert path embedding, warnings when asserts are disabled
Closes IDFGH-4477
See merge request espressif/esp-idf!12371
2021-03-03 08:20:54 +00:00
Angus Gratton
d6f4d99d93
core system: Fix warnings in compilation when assertions are disabled
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Adds a CI config for hello world that sets this, to catch future regressions
2021-03-03 10:26:57 +11:00
Renz Bagaporo
0f03f450ff
esp_hw_support: create esp_cpu
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Create a esp_cpu header that contains CPU-related functions and
utilities.
2021-02-26 13:34:29 +08:00
Omar Chebib
78a94dbb6c
freertos: Fix delay between interrupt request and trigger on RISC-V
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NOP instructions have been added in order to prevent the code
from executing code it shouldn't execute. This is due to a delay
between the moment an interrupt is requested and the moment it
is fired. It only happens on RISC-V SoC.
2021-02-25 06:57:59 +00:00
Marius Vikhammer
311a0fa5e8
freertos: add API for getting tick rate on C3
2021-02-23 12:05:52 +08:00
Marius Vikhammer
eec2419390
system: enable shared stack watchpoint
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Enable shared stack watchpoint for overflow detection
Enable unit tests:
* "test printf using shared buffer stack" for C3
* "Test vTaskDelayUntil" for S2
* "UART can do poll()" for C3
2021-02-18 15:38:30 +08:00
Ivan Grokhotkov
bb1f75179b
Merge branch 'bugfix/freertos_systimer_stall_when_cpu_halted' into 'master'
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freertos: stall systimer while CPU is in debug mode
See merge request espressif/esp-idf!12063
2021-01-29 07:02:30 +08:00
Ivan Grokhotkov
b2aaebaf85
freertos: add thread local storage support in RISC-V port
2021-01-24 12:38:15 +00:00
Ivan Grokhotkov
d7bac619ec
freertos: stall systimer while CPU is in debug mode
2021-01-24 11:32:17 +00:00
Li Shuai
63c4e5481f
fix no RTOS SysTick interrupt for a period of time after the OS Scheduler is started
2021-01-19 14:51:22 +08:00
Li Shuai
355dd10257
light sleep: dfs support for esp32c3
2021-01-19 14:50:58 +08:00
Jakob Hasse
b51889dccb
system: stack watchpoint support on C3
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Closes IDF-2307
2021-01-14 17:46:44 +08:00
morris
9e7d2c0065
esp32c3: format and clean up interrupt and os port code
2021-01-05 15:39:46 +08:00
Felipe Neves
f4781d3b1d
freertos: riscv port now uses interrupt allocator and crosscore interrupt
2021-01-05 15:39:46 +08:00
Felipe Neves
810be86f21
freertos/riscv: move freertos aware interrupt code from vectors to the freertos riscv port.
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The riscv vectors.S in riscv component contains the trap vector, which is responsible to
defer interrupts and examine if a task context switch is needed, this change cleans up
this code by hiding all freertos details behind on two functions rtos_it_enter/exit and
their implementations are placed in freertos riscv port files.
2021-01-05 15:39:46 +08:00
Angus Gratton
5228d9f9ce
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-12-01 10:58:50 +11:00
Angus Gratton
87e13baaf1
freertos: Add RISC-V port
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Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
