Commit Graph

9 Commits

Author SHA1 Message Date
Marius Vikhammer
8ac74082f1 soc: add dummy bytes to ensure instr prefetch always valid
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
2021-03-29 13:50:03 +08:00
Omar Chebib
56fe28fb23 build: fix cache issue when .flash.text section alignment is uncommon
rodata dummy section has now the same alignment as flash text section,
and at least the same size. For these reasons, the cache will map
correctly the following rodata section.
2021-03-24 16:00:48 +08:00
Renz Bagaporo
c6f0d47758 esp32: move bt linker script placements to ldgen 2021-03-01 14:19:34 +08:00
Renz Bagaporo
115b6ac0ac esp32: transfer coredump linker script blocks to ldgen 2021-03-01 14:19:34 +08:00
Ivan Grokhotkov
9a20283485 Merge branch 'bugfix/scan_test_missing_build_apps_without_tests' into 'master'
ci: bugfix: scan_test missing build apps without tests

See merge request espressif/esp-idf!12138
2021-01-28 17:48:24 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Fu Hanxi
e4e375f488 fix: add spi_flash.h for s2, s3, c3 targets in cpu_start.c
update s2, s3, c3 ld files spi_flash_attach to esp_rom_spiflash_attach
2021-01-27 12:35:49 +08:00
Jakob Hasse
ed42758549 [cxx/system]: fix init_priority ordering on RISCV
* C++ init_priority attributes work now on RISCV
* Add debug output for init_array functions

Closes IDF-2206
Closes https://github.com/espressif/esp-idf/issues/6351
2021-01-07 16:04:17 +08:00
morris
8330b2541a esp32c3: added target component 2020-12-11 11:44:01 +08:00