alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
12,630 Commits 20 Branches 148 Tags 384 MiB
353826cacc
Commit Graph

60 Commits

Author SHA1 Message Date
morris
353826cacc rmt: fix RMT data trancate issue 
Closes https://github.com/espressif/esp-idf/issues/5992
 2020-10-27 19:43:11 +08:00
Michael (XIAO Xufeng)
214cc69fc1 Merge branch 'bugfix/spi_master_multiple_dev_with_diff_cs_lvl_4.1' into 'release/v4.1' 
spi_master: correctly set cs polarity (4.1)

See merge request espressif/esp-idf!10392
 2020-09-21 10:19:33 +08:00
Wielebny666
67d7fad764 spi_master: correctly set cs polarity 
All devices must be added to the same spi line before use.
 2020-09-10 14:48:37 +08:00
fuzhibo
72f43489a5 rtc(adc/rtcio): fix adc rtcio driver for esp32 2020-08-31 03:19:58 +00:00
Michael (XIAO Xufeng)
fc1f1902a8 Merge branch 'bugfix/gpio_hold_function_for_esp32' into 'release/v4.1' 
Bugfix/gpio hold function for esp32 (backport v4.1)

See merge request espressif/esp-idf!9175
 2020-08-21 18:50:23 +08:00
Michael (XIAO Xufeng)
c83a8c4cc7 Merge branch 'bugfix/fix_fifo_cnt_bug_v4.1' into 'release/v4.1' 
bugfix(uart): fix esp32 fifo_cnt bug(backport v4.1)

See merge request espressif/esp-idf!9040
 2020-08-20 19:13:57 +08:00
Michael (XIAO Xufeng)
000c0b4b8a Merge branch 'bugfix/fix_adc_dac_conflict_backportv4.1' into 'release/v4.1' 
Driver(adc): Disable the synchronization operation function of ADC1 and DAC (backport v4.1)

See merge request espressif/esp-idf!9361
 2020-08-20 19:12:35 +08:00
fuzhibo
4fc12259dd Driver(adc): Disable the synchronization operation function of ADC1 and DAC 
Closes IDF-1585
 2020-08-14 06:49:35 +00:00
fuzhibo
c711a048bb driver(gpio): Solve gpio hold problems caused by code refactoring. 
Closes https://github.com/espressif/esp-idf/issues/4600
 2020-06-28 14:12:29 +00:00
xiongyu
cf3b2df4a4 bugfix(uart): fix esp32 fifo_cnt bug 
When using DPort to read fifo, fifo_cnt is not credible, we need to calculate the real cnt based on the fifo read and write pointer. When using AHB to read FIFO, we can use fifo_cnt to indicate the data length in fifo.
 2020-06-16 14:48:02 +08:00
Michael (XIAO Xufeng)
d2666545d1 spi: simplify the caps header 2020-05-27 15:09:50 +08:00
morris
5b516b107a timer_group: update hal api && fix intr_enable 
timer group interrupt enable is controled by level_int_ena instead of int_ena

Closes https://github.com/espressif/esp-idf/issues/5103
 2020-04-29 12:19:25 +08:00
espressif
7d934dafb8 mcpwm: fix the issue of wrong period (backport v4.1) 2020-04-24 21:10:14 +08:00
morris
bd8baba0dc rmt: fix missing 0x in rmt_ll.h 
Closes https://github.com/espressif/esp-idf/issues/4760
 2020-02-18 10:54:03 +08:00
Angus Gratton
c7738f24fc Merge branch 'bugfix/ledc_driver_enums' into 'master' 
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum

See merge request espressif/esp-idf!7021
 2020-01-10 15:34:43 +08:00
Darian Leung
a049e02d96 can: Refactor CAN to use HAL and LowLevel layers 
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
 2020-01-09 16:13:51 +08:00
morris
7baf7ce273 ethernet: optimise tx and rx 2019-12-24 11:18:31 +08:00
kewal shah
eec8212237 add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty 2019-12-16 20:26:04 +00:00
Angus Gratton
435dd546cc driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum 
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.

The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.

Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.

To avoid accidental errors, make the numeric values for the two similarly named enums the same.,

Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
 2019-12-16 19:43:11 +11:00
Wang Jia Lin
f5e60524ac Merge branch 'bugfix/fix_i2c_driver_breakingchange_issue' into 'master' 
bugfix(i2c): fix I2C driver breaking change issue

See merge request espressif/esp-idf!6809
 2019-12-06 16:50:16 +08:00
houwenxiang
aac935ec81 bugfix(i2c): fix I2C driver breaking change issue. 
1. Fixed I2C driver breaking change issue.
    2. Add I2C UT test case.
 2019-12-04 15:51:36 +08:00
houwenxiang
e4230d11ca bugfix(UART): fix uart driver spinlock misused bug 
1. fix uart driver spinlock misused bug
    2. add uart driver ut test case
    3. undo the change in light_sleep_example_main.c
 2019-12-03 16:06:31 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation 
Otherwise IRAM usage is too high in this example.
 2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
Angus Gratton
91b7a7beaf Merge branch 'bugfix/timer_intr_status_get' into 'master' 
bugfix(timer): fix get intr status function

See merge request espressif/esp-idf!6807
 2019-11-27 09:13:16 +08:00
chenjianqiang
856d9f7d89 bugfix(timer): recover get raw interrupt status function 2019-11-26 12:39:46 +00:00
houwenxiang
f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00
Angus Gratton
f2a1a6105a Merge branch 'feat/mcpwm_hal' 
Manual merge of !6626
 2019-11-25 17:18:48 +11:00
Angus Gratton
6dd36fd571 Merge branch 'refactor/hal_gpio_driver' 
Manual merge of !5597
 2019-11-25 10:49:40 +11:00
Angus Gratton
f34edba8f3 Merge branch 'feature/adc_driver_hal_support' 
Manual merge of !6044
 2019-11-25 10:22:06 +11:00
michael
538540ce21 mcpwm: add HAL layer support 
Also improved the unit tests a bit.
 2019-11-25 00:36:30 +08:00
xiongyu
a3b79e9202 refactor(gpio): add hal gpio driver 2019-11-22 17:24:53 +08:00
fuzhibo
f49b192a5e refactor the adc driver 2019-11-22 15:42:16 +08:00
Mahavir Jain
25c0752682 i2s: fix regression in retrieval of chip revision causing apll test to fail 2019-11-22 11:46:38 +05:30
fuzhibo
03ac1aaafd dac: refactor driver add hal 2019-11-22 11:44:46 +08:00
houwenxiang
28286183d1 feature(I2C): Add i2c hal support. 2019-11-21 20:34:07 +08:00
chenjianqiang
857dec108d feat(ledc): refactor ledc driver 
1. add hal and low-level layer for ledc driver
2. support esp32s2beta ledc
 2019-11-21 16:25:22 +08:00
chenjianqiang
9f9da9ec96 feat(timer): refator timer group driver 
1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
 2019-11-21 14:14:19 +08:00
xiongyu
e62b831867 refactor(sigmadelta): add hal sigmadelta driver 2019-11-21 11:53:07 +08:00
fuzhibo
0c2bf7c8bc rtcio: add hal for driver 2019-11-21 10:40:49 +08:00
Angus Gratton
b30b0e59fa Merge branch 'feature/add_rmt_hal' into 'master' 
rmt: add hal layer and new examples

Closes IDF-841, IDF-844, and IDF-857

See merge request espressif/esp-idf!5649
 2019-11-21 09:53:54 +08:00
morris
8fd8695ea1 rmt: add HAL layer 2019-11-20 10:54:21 +08:00
xiongyu
8c76a3c10d refactor(i2s): add hal i2s driver 2019-11-19 22:19:19 +08:00
xiongyu
b1a72866ca refactor(pcnt): add hal pcnt driver 2019-11-18 14:35:46 +08:00
Angus Gratton
8675a818f9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-22 13:51:49 +11:00
Angus Gratton
496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues 
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
 2019-10-14 17:25:58 +08:00
suda-morris
13c128fd31 Ethernet: optimize and bugfix 
1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
 2019-10-11 12:15:17 +08:00
Michael (XIAO Xufeng)
43135dc348 spi: convenient LL macro 2019-09-04 10:53:25 +10:00
Angus Gratton
6990a7cd54 Merge branch 'master' into feature/esp32s2beta_update 2019-08-19 15:03:43 +10:00