Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
The functions `uart_enable_pattern_det_intr` have been renamed to `uart_enable_pattern_det_baud_intr`, but a reference to these functions in the programming guide was not updated.
Merges https://github.com/espressif/esp-idf/pull/10856
