Commit Graph

449 Commits

Author SHA1 Message Date
jingli
9a61a07fd8 esp_hw_support/clk_cali: remove redundant check for cali value 2022-09-21 15:13:22 +08:00
Zim Kalinowski
6c3267e8a9 Merge branch 'feature/s2_s3_support_ext_mem_stack_v4.4' into 'release/v4.4'
soc: support placing task stacks in external memory for S2 and S3 (v4.4)

See merge request espressif/esp-idf!20001
2022-09-13 21:24:02 +08:00
Marius Vikhammer
78d7844b01 system: fix SET_STACK macro crashing in windowoverflow8 exception
If a windowoverflow8 happened after changing the SP, the exception handler would look for
the extra save area by looking at the previous frame's SP. This SP would be a garbage value
and could cause the windowoverflow exception to write to invalid memory ares.
2022-09-06 15:54:57 +08:00
Darian Leung
a45fcce631 newlib: Add workaround for printf functions using 32-bit time_t on first call
sizeof(time_t) was previously switched from 4 to 8, ROM functions that use
time_t or dependent types (such as "struct stat") are no longer called due as
they still treat sizeof(time_t) as 4 (see commit
24c20d18).

However, there is a ROM callpath that was left out. If putchar is the first
stdio print related call, the call path will result in cantwrite() ->
__swsetup_r() -> __smakebuf_r() -> __swhatbuf_r() using the ROM "struct stat"
(where sizeof(time_t)==4).

Instead of removing all printf related ROM newlib functions (which will result
in increased binary size), this commit adds a workaround to setup the stdio
files before any print related calls occur.

This results in cantwrite() always returning false, thus the callpath described
above never being reached.

Closes https://github.com/espressif/esp-idf/issues/9269
2022-08-22 11:56:51 +08:00
Omar Chebib
3154abc66e (Xtensa) Build: add .xt.prop and .xt.lit to the compiled ELF file
Adding prop and lit sections to the ELF will let the debugger and the disassembler
have more info about data bytes present in the middle of the Xtensa
instructions, usually used for padding.
2022-08-17 14:58:36 +08:00
Marius Vikhammer
a421e30cf2 system: moved placement of disable rom log efuse in startup flow
Functions used for burning this efuse would log, but at this point
esp_log is not initialized. Moved to a later point in the startup process.

Closes https://github.com/espressif/esp-idf/issues/9457
2022-08-10 12:17:51 +08:00
Marius Vikhammer
f8729d905e Merge branch 'feature/ulp_riscv_adc_v4.4' into 'release/v4.4'
ulp-riscv: add support for using ADC as well as an example show-casing it. (v4.4)

See merge request espressif/esp-idf!19058
2022-08-09 15:00:50 +08:00
Marius Vikhammer
f8f93d936e ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-08-09 09:21:15 +08:00
Li Shuai
12db32642c substract rtc_iram_seg memory region size from ESP_BOOTLOADER_RESERVE_RTC 2022-08-08 11:27:10 +08:00
Mitch Bradley
5728fe325e Reverts Backtrace: format to what it used to be
Was:  Backtrace: N:M N:M N:M ...
Now:  Backtrace:N:MN:M N:M ...

The problem with the new format is that it is hard to parse and
breaks the parser that is used by PlatformIO.  The old format
is much more reasonable.  I do not see how the pattern in IDFDUT.py
can work with the new format, due to the missing space after the :
2022-07-19 11:55:32 +02:00
Jiang Jiang Jian
b9a1020fcf Merge branch 'bugfix/reset_ble_hw_on_inititalization_v4.4' into 'release/v4.4'
[Bluetooth] Reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3(release/v4.4)

See merge request espressif/esp-idf!18964
2022-07-11 16:28:53 +08:00
wangmengyang
4d5aa82cea component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and MAC bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-11 11:06:11 +08:00
Alexey Lapshin
09289fe451 esp_system: Fix esp32c2/esp32c3/esp32h2 TLS size
The change fixes thread-local-storage size by removing .srodata section
from it. It initially was included in TLS section by mistake.
The issue was found when stack size increased after building applications
with GCC-11.1 compiler. Stack size became bigger because some new data
appeared in .srodata. See more details here:
adce62f53d
2022-07-01 15:19:21 +04:00
Jiang Jiang Jian
69951819a0 Merge branch 'bugfix/s3_increase_static_alloc_size_v4.4' into 'release/v4.4'
bootloader, esp_system: increase static allocation space for esp32s3 (v4.4)

See merge request espressif/esp-idf!18685
2022-07-01 10:54:25 +08:00
Jiang Jiang Jian
cd2f38a7bb Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst_v4.4' into 'release/v4.4'
reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0 (v4.4)

See merge request espressif/esp-idf!17871
2022-07-01 10:43:40 +08:00
Ivan Grokhotkov
74e9376022
esp_system: fix garbled UART output on startup on esp32s2
Closes https://github.com/espressif/esp-idf/issues/9168
2022-06-29 12:33:05 +02:00
Ivan Grokhotkov
6e6b9ec5a6
bootloader, esp_system: increase static allocation space for esp32s3
The previously used splits between memory allocated for ROM code,
2nd stage bootloader and the app were somewhat safe and conservative.
This resulted in some space being unavailable for static allocation
in the app.

This commit increases the space available for static allocation to the
maximum possible amount.

1. Some of the ROM code static allocation is only used in UART/USB/SPI
   download modes. This region ("shared buffers") has been placed at
   the lower end of ROM memory area, to be reusable in flash boot
   mode. The 2nd stage bootloader linker script is modified to "pack"
   all sections exactly up to the end but with roughly 8K margin between
   startup stacks.
2. Instead of calculating the sections placement and hardcoding the
   addresses in the LD script again, rewrite it to calculate the
   start address of each memory region automatically based on the
   logic above.
3. Adjust the app memory layout (SRAM_IRAM_END) accordingly,
   increasing the space available for static allocation.

Overall these changes increase the space available for static
allocation by about 78kB.

The downside of these changes is that the 2nd stage bootloader .data
segment is now directly adjacent to the startup stack on the PRO CPU.
Previously, there was effectively about 78kB of extra stack space for
the PRO CPU, before the stack would run into the data segment.
2022-06-27 09:22:01 +05:30
KonstantinKondrashov
c563d799fe efuse: Checks errors of 4x coding scheme for BLOCK0 if so then abort 2022-06-22 17:16:26 +08:00
KonstantinKondrashov
dcc706280d reset_reasons: EFUSE_RST is treated as POWERON_RST
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-22 16:39:02 +08:00
Michael (XIAO Xufeng)
93d27565ac test_rtc: add test_app to test power consumption 2022-06-06 00:51:38 +08:00
Michael (XIAO Xufeng)
deea85b848 pm: add test for RTC using 8MD256 as clock source 2022-06-06 00:16:03 +08:00
Alexey Gerenkov
9017ff235b riscv: Use semihosting to set breakpoint and watchpoint when running under debugger 2022-05-13 12:54:21 +03:00
Ivan Grokhotkov
ad532236ae vfs: add support for semihosting on ESP32-C3 2022-04-19 13:55:36 +00:00
Roland Dobai
ff84535758 esptool_py: Update to support ESP32-S3 USB OTG compressed flashing with stub 2022-04-14 12:28:28 +02:00
Omar Chebib
b868fd2a95 espcoredump: fix a bug where tracked DRAM data where not dumped
Variables marked as COREDUMP_DRAM_ATTR will now be part of the core dump.

* Closes https://github.com/espressif/esp-idf/issues/8151
2022-02-22 02:38:00 +00:00
KonstantinKondrashov
90c63f7250 esp_system: ipc_isr does not use its own initialization task, it is done from ipc_task()
It helps to reduce the memory usage at startup.

Closes https://github.com/espressif/esp-idf/issues/8111
2022-02-18 12:36:05 +08:00
Jiang Jiang Jian
e3a5a85e2f Merge branch 'feature/gcov_esp32c3_v4.4' into 'release/v4.4'
debug_stubs and gcov: Refactor and add support for RISCV (v4.4)

See merge request espressif/esp-idf!17068
2022-02-16 03:26:49 +00:00
Michael (XIAO Xufeng)
730ca0ea43 Merge branch 'bugfix/cpu_reset_perip_clk_disable_v4.4' into 'release/v4.4'
esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison (backport v4.4)

See merge request espressif/esp-idf!15898
2022-02-10 10:32:09 +00:00
Alexey Gerenkov
1bbefc3e5d debug_stubs: Refactor and add support for RISCV 2022-02-08 22:24:54 +03:00
songruojing
b80a070395 esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset
(cherry picked from commit f57456e9dd919e5eea1d3cd0caa64b5c97a4df73)
2022-01-27 09:51:00 +00:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3)
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
2022-01-27 12:40:27 +08:00
Roland Dobai
a59e3ab59d Merge branch 'feature/esp32s3_apptrace_v4.4' into 'release/v4.4'
Feature/esp32s3 apptrace v4.4

See merge request espressif/esp-idf!16649
2022-01-26 09:58:35 +00:00
KonstantinKondrashov
8f2045f0da esp_system: Fix RTC_WDT protection in esp_restart_noos
Fixed issue - v4.3 app not compatible with 3.1 bootloader
2022-01-10 21:57:29 +08:00
Alexey Gerenkov
8c2990fcea trax: Adds ESP32-S3 support 2022-01-05 19:34:28 +01:00
Martin Vychodil
60386410ae System: fix RTCFAST section alignment
This bugfix contains 3 fixes:
1. .rtc_dummy section is removed (not needed for C3)
2. .rtc_text section is padded with 16B for possible CPU prefetch
3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirements
2021-12-22 21:58:20 +01:00
Marius Vikhammer
d730c84038 ci: fix "can set sleep wake stub from stack in RTC RAM" test case failure
"can set sleep wake stub from stack in RTC RAM" would randomly fail on S3 due to stack overflow.

Fixed wrong usage of stack size and slightly increased it.
2021-12-09 13:59:30 +08:00
Erhan Kurubas
b748053e2e startup: init timer before calling esp_apptrace_tmo_init 2021-11-25 23:58:36 +01:00
Cao Sen Miao
fcecbde778 vfs_usb_serial: set secondary selection for making usb port can output under default menu 2021-11-17 19:54:15 +08:00
Ivan Grokhotkov
85bc2d7240 esp_timer: allow querying the timer before esp_timer_init is called 2021-11-15 19:38:09 +08:00
Darian Leung
7e725751e4 freertos: Remove critical nested macros
This commit removes the following critical nested macros as follows:

- portENTER_CRITICAL_NESTED()
- portEXIT_CRITICAL_NESTED()

They are replaced with portSET_INTERRUPT_MASK_FROM_ISR() and
portCLEAR_INTERRUPT_MASK_FROM_ISR() which are the proper FreeRTOS interfaces.

Created a portmacro_deprecated.h for each port to contain deprecated API
that were originally from portmacro.h
2021-11-10 18:34:32 +08:00
Martin Vychodil
3f26866533 System/Security: wrong check of the Memprot feature in esp_restart()/panic_restart()
esp_restart()/panic_restart() never resets the Digital system (so far required only by the Memprot feature) as there's a typo in the corresponding #define:
it checks CONFIG_ESP_SYSTEM_CONFIG_MEMPROT_FEATURE instead of CONFIG_ESP_SYSTEM_MEMPROT_FEATURE.
Issue fixed.

IDF-4094
2021-10-29 15:02:17 +02:00
Ivan Grokhotkov
d47d413e25 esp_system: fix high level interrupt handler not linked for GNU Make
In 4972605, high-level interrupt handler hook was renamed from
ld_include_highint_hdl to ld_include_panic_highint_hdl. However the
change wasn't applied in GNU Make based build system. As a result,
the default interrupt handler was linked and features which depended
on the high-level interrupt didn't work.

Closes https://github.com/espressif/esp-idf/issues/7759
Closes https://github.com/espressif/esp-idf/issues/7447
2021-10-26 11:26:45 +02:00
Mahavir Jain
81e3eb45ca cpu_start: rename function to add core prefix for more clarity 2021-10-20 15:16:25 +05:30
Mahavir Jain
61820f5b30 cpu_start: let individual core clear its interrupt matrix
There was race condition where interrupt entries set by APP cpu core
could have been cleared during PRO cpu startup.

This was observed while setting up "cache access error" interrupt in
SMP mode for ESP32-S3.

This fix allows to NOT modify or clear any entries set by other core
(APP or PRO) and thus avoiding any race conditions during startup code.
2021-10-20 15:16:25 +05:30
Mahavir Jain
bdeaeb8d7f esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3 2021-10-20 15:16:25 +05:30
Li Shuai
e8188e5d8f ci: replacing old header with new SPDX header style 2021-10-20 11:36:23 +08:00
Li Shuai
7c7f3aa84e unit test: add sleep test case for esp32s3 2021-10-20 11:36:23 +08:00
Li Shuai
a939f7d34b light sleep: add software workaround for esp32s3 gpio reset issue 2021-10-20 11:36:22 +08:00
Li Shuai
881e1b0fd5 deep sleep: add deep sleep support for esp32s3 2021-10-20 11:36:20 +08:00
Li Shuai
9298db641e deep sleep: fix some rtc fast memory definition errors in esp32s3 2021-10-19 21:47:27 +08:00