Commit Graph

39 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-06-05 02:33:50 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-12 15:57:09 +08:00
Michael (XIAO Xufeng)
d378ca2b78 esp_phy: use spinlock to avoid regi2c access conflicts 2022-04-06 12:18:23 +08:00
Armando
32afe6a498 sleep: restore analog calibration registers after waking up from light sleep
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
2022-03-07 11:28:48 +08:00
Cao Sen Miao
e2ef65e117 psram: add ESP32-D0WD-R2-V3 support 2022-01-10 10:39:00 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON
save
2021-09-16 20:57:57 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
Marius Vikhammer
2e0cab6f94 himem: reverse error check logic in himem 2021-08-31 08:46:27 +08:00
SalimTerryLi
55a5c444b5
rtc_io, esp_himem: replace XXX_CHECK with ESP_RETURN_ON_FALSE 2021-08-30 11:18:34 +08:00
Jan Brudný
7f50818a99 esp_hw_support: update copyright notice 3 2021-08-10 13:30:57 +02:00
Konstantin Kondrashov
4972605b16 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
Armando
ad8e1a395c memory: port SPIRAM noinit segment support to master 2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f esp32: Add support for noinit variables in SPIRAM
Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.

This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.

The EXT_RAM_NOINIT_ATTR macro places variables in this section.
2021-07-29 10:28:38 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master'
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Renz Bagaporo
844af01eb4 esp32: move spiram, himem 2021-07-16 20:14:26 +08:00
Renz Bagaporo
452bfda367 esp32: move dport_access 2021-07-16 20:14:26 +08:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image
Includes fix for detecting ESP32 ECO3 on FPGA
2021-07-16 10:50:06 +10:00
Angus Gratton
192b5925da bootloader: Can boot to IDF scheduler start on internal-use FPGA
On ESP32 & ESP32-S2. Patch doesn't include changes to make the app run fully.
2021-07-16 10:50:06 +10:00
Almir Okato
06a849b33e rtc: Add missing esp_rom_sys.h header in rtc clk
rtc_clk.c for esp32, esp32s2 and esp32s3 did not include the
esp_rom_sys.h header which could cause implicit declaration issues for
some function calls.
2021-07-01 12:50:14 -03:00
Jiang Jiang Jian
d28417edbc Merge branch 'bugfix/deep_sleep_rtcwdt_rst_issue' into 'master'
clear wakeup and reject int raw signal before entry sleep

Closes FCS-673

See merge request espressif/esp-idf!13982
2021-06-29 13:31:40 +00:00
Li Shuai
6ca207531b deep sleep: clear wakeup and reject int raw signal before entry sleep 2021-06-29 11:59:54 +08:00
Marius Vikhammer
ee2f8b1a62 build system: always build with -fno-jump-tables & -fno-tree-switch-conversion
Jump tables placed in flash would cause issue with code that needed to be ran from IRAM.

These optimizations are now always disabled.
2021-06-24 14:54:10 +08:00
Omar Chebib
dd8843fec3 regi2c: add a spinlock for accessing (reg)I2C devices
When not compiling bootloader, a spinlock will be used for reading or writing
I2C internal devices/registers.
When compiling for bootloader, no need to use any lock.
2021-05-13 11:55:41 +08:00
Li Shuai
344ec80fad optimize deep sleep current in wifi softap mode 2021-04-28 14:03:02 +00:00
Angus Gratton
70cab5bd81 Merge branch 'bugfix/ulp_riscv_unintended_wake' into 'master'
ulp: unintended wakeup in ulp_riscv

See merge request espressif/esp-idf!12894
2021-04-08 01:52:41 +00:00
Renz Bagaporo
9478298aa4 esp32: move mac target specific configs 2021-03-31 19:17:33 +08:00
Renz Bagaporo
4a08264e7a esp_system: split esp_system.h header 2021-03-31 19:13:03 +08:00
Renz Bagaporo
3639c2322b ulp: clear rtc int at initialization
Closes https://github.com/espressif/esp-idf/issues/6654
2021-03-31 17:15:55 +08:00
Angus Gratton
f683db7aea Merge branch 'feature/c3_IDF-2554' into 'master'
global: Uses CCOUNT API instead of XTHAL macro

Closes IDF-2554

See merge request espressif/esp-idf!11954
2021-01-13 12:55:21 +08:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
ninh
dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
Cao Sen Miao
e338a2e3df rtc: add function to en/disable the rtc clock 2020-12-23 09:53:24 +11:00
chaijie
a48b5246cc ESP32: Fix xtal 32k not oscillate or oscillate too slowly issue
ESP32 in revision0 and revision1 uses touchpad to provide
current to oscillate xtal 32k. But revision2 and revision3
do not need to do that.
Note: touchpad can not work and toupad/ULP wakeup sources
are not available when toupad provides current to xtal 32k
2020-11-23 19:38:11 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00