Commit Graph

16 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
1cbf9506b2 spi_flash_test: remove threshold from unit test 2022-01-16 19:19:14 +00:00
Armando
6a74cb695d spi: support spi on 8684 2022-01-12 11:30:29 +08:00
Marius Vikhammer
7fc7c49e5d crypto: allocate all DMA descriptors to DMA capable memory.
These were previously placed on the stack, but the stack could be placed in
RTC RAM which is not DMA capable.
2021-12-08 12:09:01 +08:00
Michael (XIAO Xufeng)
904afc65f8 ci: adjust spi_flash performance value according to more test data
After we have the performance dashboard, we have more data and no longer depend on the threshold to ensure performance.
Set looser performance thresholds to avoid CI failure.
2021-06-17 09:49:04 +08:00
Marius Vikhammer
1b6891c5d8 mbedtls: merge changes from C3 2020-12-29 10:56:13 +08:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Michael (XIAO Xufeng)
6c2b6c9340 esp_flash: decrease performance threshld
To reflect the influence of yield during write
2020-11-10 19:05:29 +08:00
Michael (XIAO Xufeng)
3c402f83a8 esp_flash_test: decrease some performance threshold by 6%
Due to the 32-bit flash feature, some performance value are decreased by 6%
2020-10-30 01:11:43 +08:00
Michael (XIAO Xufeng)
baab55e230 esp_flash: decrease performance threshold of ESP32-S2
The data is based on 95% of minimal performance value from CI failure in the past 30 days.
2020-09-10 12:25:40 +08:00
Michael (XIAO Xufeng)
64535528ac flash test: decrease the threshold of performance test on s2 2020-08-06 13:13:56 +08:00
Michael (XIAO Xufeng)
9e3b807036 esp_flash: reduce the rd ext performance for s2 2020-07-27 12:27:06 +08:00
Marius Vikhammer
b75edc84e3 esp32s2 SHA: fallback to hashing block by block for non DMA memory
Also adds unit test for SHA with input buffer in flash

Closes IDF-1529
2020-06-10 15:09:20 +08:00
Marius Vikhammer
32fd9d6c63 s2 crypto: update perf test to use cache comp timer
Updated S2 hardware accelerated crypto to use the cache compensated timer.

Re-enabled RSA performance test and set lower targets now that results are more stable

Closes: IDF-1174
2020-03-23 11:30:55 +08:00
Marius Vikhammer
7e824508a9 mpi: refactor bignum into common and hw specific components
Closes IDF-1174
2020-03-16 19:44:30 +08:00
Marius Vikhammer
3351376a11 AES: optimize AES-GCM
HW acceleration for GCM is now enabled by default

Closes IDF-1443
2020-03-12 10:20:24 +08:00
Roland Dobai
15884eccf2 Add multi-target support for performance tests 2020-03-09 13:41:56 +01:00