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889 Commits

Author SHA1 Message Date
Jiang Jiang Jian
a13ab34101 Merge branch 'refactor/rtc_init_before_mspi_tuning_v5.1' into 'release/v5.1'
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fix(startup): move rtc initialization before MSPI timing tuning to improve stability (v5.1)

See merge request espressif/esp-idf!32555
 2024-09-21 15:01:16 +08:00
Xiao Xufeng
7d4d6ae5fd fix(MMU): fixed mmap deadlock when using multicore app with unicore bootloader 
Closes https://github.com/espressif/esp-idf/issues/11617
 2024-09-18 19:31:33 +08:00
Xiao Xufeng
dbed93dce8 fix(startup): move rtc initialization before MSPI timing tuning to improve stability 2024-09-18 19:30:22 +08:00
Chen Jichang
bec23c9d81 feat(psram): add psram noinit segment support on S2/S3/P4/C5 
Closes https://github.com/espressif/esp-idf/issues/14253
 2024-09-04 15:08:12 +08:00
KonstantinKondrashov
17c3f85a89 feat(ipc): Adds a new no blocking IPC call 2024-08-07 15:13:11 +03:00
wuzhenghui
563683f471
change(esp_system): trigger digital system reset in brownout isr 2024-06-24 12:07:30 +08:00
morris
d7c75b92d1 Merge branch 'bugfix/check_c3_efuse_error_on_ram_app_condition_v5.1' into 'release/v5.1' 
bugfix(cpu_start): check c3 efuse error log on ram app condition (v5.1)

See merge request espressif/esp-idf!31046
 2024-05-27 15:43:21 +08:00
Armando
bb51330aa6 bugfix(cpu_start): check c3 efuse error log on ram app condition 
Prior to this commit, esp_efuse_check_errors() is only called when it's
2nd stage btld app.

This commit moves this error check so under all conditions (including
ram app, pure ram app) will check this efuse error
 2024-05-23 15:56:08 +08:00
Marius Vikhammer
39074c031e fix(brownout): fixed brownout isr crashing if cache disabled 
If a brownout ISR was triggered while cache was disabled the system would panic.

This was due to a print accessing a string stored in flash
 2024-05-22 10:19:10 +08:00
Jiang Jiang Jian
a2bbd59755 Merge branch 'support/esp_sleep_enable_ext1_wakeup_io_v5.1' into 'release/v5.1' 
Support/esp sleep enable ext1 wakeup io(backport v5.1)

See merge request espressif/esp-idf!30164
 2024-05-13 10:42:20 +08:00
wuzhenghui
6e1659c233
fix(esp_system): increase 26Mhz esp32c2 slow clock calibration timeout watchdog threshold 2024-04-30 11:47:18 +08:00
Lou Tianhao
b8c6179355 change(pm): add ext1 new api 2024-04-15 20:33:02 +08:00
liuning
cb0fd9010b fix(clk): clear all lpclk source at clk init 2024-03-15 10:49:18 +08:00
Erhan Kurubas
5d1b6b7b99 feat(coredump): save twdt panic output to coredump elf file 2024-03-12 10:40:29 +01:00
Erhan Kurubas
7ec19d4268 refactor(espcoredump): simplify uart/flash write flow 2024-03-11 17:12:41 +08:00
Jiang Jiang Jian
f87ee9c4ec Merge branch 'bugfix/fix_c6_wakeup_access_flash_v5.1' into 'release/v5.1' 
fix(hal): fix esp32c6 clock bug workaround access flash in wakeup process (v5.1)

See merge request espressif/esp-idf!29245
 2024-03-05 10:58:14 +08:00
Jiang Jiang Jian
76152c80a2 Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)

See merge request espressif/esp-idf!28722
 2024-02-28 10:49:13 +08:00
Jiang Jiang Jian
ffd34ba04a Merge branch 'bugfix/bod_threshold_v5.1' into 'release/v5.1' 
fix(bod): Fix BOD threshold value on ESP32H2(backport v5.1)

See merge request espressif/esp-idf!28624
 2024-02-27 19:58:51 +08:00
Mahavir Jain
7003f1ef0d Merge branch 'bugfix/ota_anti_rollback_checks_2_v5.1' into 'release/v5.1' 
feat(bootloader_support): Read secure_version under sha256 protection (v5.1)

See merge request espressif/esp-idf!29060
 2024-02-27 18:26:03 +08:00
wuzhenghui
54a15b81f9
feat: support cache safe assertion check in sleep process 
- Add support for cache safe assertion check to ensure that code expected to be in RAM is in IRAM
 2024-02-26 17:24:04 +08:00
hongshuqing
80378b809e feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 15:01:14 +08:00
Marius Vikhammer
d9a6158700 fix(system): update reset reasons for C6 and H2 2024-02-22 12:36:09 +08:00
Mahavir Jain
83ec466b26 fix(ota): additional checks for secure version in anti-rollback case 
Some additional checks related to secure version of the application in
anti-rollback case have been added to avoid any attempts to boot lower
security version but valid application (e.g., passive partition image).

- Read secure_version under sha256 protection

- First check has been added in the bootloader to ensure correct secure
  version after application verification and loading stage. This check
  happens before setting up the flash cache mapping and handling over
  the final control to application. This check ensures that application
  was not swapped (e.g., to lower security version but valid image) just
  before the load stage in bootloader.

- Second check has been added in the application startup code to ensure
  that currently booting app has higher security version than the one
  programmed in the eFuse for anti-rollback scenario. This will ensure
  that only the legit application boots-up on the device for
  anti-rollback case.
 2024-02-15 15:10:28 +02:00
Cao Sen Miao
bba56bc016 fix(bod): Fix BOD threshold value on ESP32H2 2024-01-23 10:13:33 +08:00
Xiao Xufeng
a055fcbda4 fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:19:20 +08:00
muhaidong
13094f2216 change(wifi): update esp_coexist_internal.h and esp_modem_wrapper.h 2023-12-19 19:15:49 +08:00
morris
1b78d57496 Merge branch 'bugfix/bod_reset_c6_h2_v5.1' into 'release/v5.1' 
fix(bod): Reset brownout in configuration to avoid RF cannot be enabled again(backport v5.1)

See merge request espressif/esp-idf!27723
 2023-12-14 11:05:55 +08:00
wuzhenghui
4a7d9dd387
fix(esp_hw_support): re-initialize icg map in modem_clock_module_enable 2023-12-08 14:22:36 +08:00
Cao Sen Miao
9dd90e2d9b fix(bod): Reset brownout in configuration to avoid RF cannot be enabled again 2023-12-07 10:33:58 +08:00
Erhan Kurubas
5e88ecfd02 fix(esp_hw_support): re-enable CONFIG_ESP_DEBUG_OCDAWARE functionality 2023-11-24 09:54:18 +00:00
Ivan Grokhotkov
6ec4937cec
esp_system: usb_console support for ESP32-S3 
Closes https://github.com/espressif/esp-idf/issues/8879
Closes https://github.com/espressif/esp-idf/issues/8738
 2023-11-21 17:33:30 +01:00
Ivan Grokhotkov
6d1f573945
esp_rom: implement usb deinit functions added in S3 ROM for S2 
This cleans up usb_console.c and prepares it for S3 support.
 2023-11-21 17:33:29 +01:00
Ivan Grokhotkov
228dbe103f
esp_rom: add USB_OTG "port" number for S2 and S3 2023-11-21 17:33:29 +01:00
Aditya Patwardhan
514cd783a3 Merge branch 'bugfix/esp32h2_ecdsa_hardware_k_v5.1' into 'release/v5.1' 
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose (v5.1)

See merge request espressif/esp-idf!27271
 2023-11-21 13:57:38 +08:00
Jiang Jiang Jian
2277c3c9dd Merge branch 'feature/pseudo_exccause_to_openocd_v5.1' into 'release/v5.1' 
Feature/pseudo exccause to openocd (v5.1)

See merge request espressif/esp-idf!26544
 2023-11-21 11:06:41 +08:00
Mahavir Jain
0ccfa4b0c2
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose 
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
 2023-11-20 16:03:29 +05:30
wuzhenghui
b31a07bc67 fix(esp_system): increase esp32h2 slow clock calibration timeout watchdog threshold 2023-11-03 19:03:48 +08:00
Shen Weilong
ea06b047c2 feat(bt): Frees BLE memory when no longer in use 
It will free libble.a & libbt all txt, data and bss segment memory.
          This memory is combined into one large memory and put into the heap
          pool.
 2023-10-19 14:52:29 +08:00
Erhan Kurubas
b07702b6ad feat(panic): send pseudo exccause to openocd 2023-10-18 10:31:42 +02:00
Jiang Jiang Jian
bdf54031b6 Merge branch 'revert_tcpip_task_priority_macro_v5.1' into 'release/v5.1' 
revert(lwip): Revert changes to LWIP task priority macro from MR 25020 (backport v5.1)

See merge request espressif/esp-idf!26512
 2023-10-18 14:31:40 +08:00
xuxiao
bfe6a24c57 revert(lwip): Revert changes to LWIP task priority macro from MR 25020 (backport v5.1) 2023-10-17 14:39:39 +08:00
Mahavir Jain
7745b22cc8 fix(startup): flip the security configuration check order 
For cases where the bootloader is not enabled with the security features
ends up receiving an incorrect application with flash encryption enabled
should not really program any security efuses.

In the startup sequence, we first used to program the ROM DL mode
configuration but now we check for the flash encryption related checks
first. If the flash encryption related checks finds that flash
encryption is not enabled on the device then it aborts the boot process.
This is the case with `CONFIG_SECURE_FLASH_CHECK_ENC_EN_IN_APP` enabled.

This would at-least ensure that accidental program of security enabled
application does not really program any ROM DL mode efuses and there is
chance to recover the device.
 2023-10-09 03:29:58 +00:00
wuzhenghui
a96f2c7674 fix(esp_system): suppress compiler warning if ESP_SYSTEM_PANIC_SILENT_REBOOT is enabled 2023-09-19 10:37:23 +08:00
Jiang Jiang Jian
8ce86c32d0 Merge branch 'bugfix/fix_some_wifi_bugs_230913_v5.1' into 'release/v5.1' 
fix(wifi): fix some wifi bugs 20230913(Backport v5.1)

See merge request espressif/esp-idf!25960
 2023-09-18 12:09:31 +08:00
xuxiao
b74c293505 feat(wifi): optimize esp32c6 iperf performance 2023-09-14 10:14:13 +08:00
Marius Vikhammer
c192ea478e fix(wdt): changed ESP32-C3 WDT to use XTAL as clock 
This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
 2023-09-13 10:45:49 +08:00
Erhan Kurubas
568c397822 feat(coredump): add panic details to the elf file 2023-08-28 18:48:16 +02:00
Lou Tianhao
830a627362 remove(pm/deep_sleep): enable CI test for esp32h2 deepsleep 2023-08-03 16:46:55 +08:00
Lou Tianhao
badef66538 change(pm/deepsleep): rewrite the option all low as any low for esp32s2, esp32s3, esp32c6 and esp32h2 2023-08-03 16:46:55 +08:00
Lou Tianhao
4bc5e24f82 feat(pm/deepsleep): Support deep_sleep example and deep_sleep_wake_stub example for esp32h2 2023-08-03 16:46:54 +08:00