Jan Brudný
325deed208
esp32: update copyright notice
2021-06-04 11:51:06 +02:00
Angus Gratton
3f034a5005
spiram: Add soc macro for SPIRAM address space size, use it where applicable
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Reference https://github.com/espressif/esp-idf/pull/5373
2020-09-21 11:43:55 +10:00
chenjianqiang
9de04b9f5f
feat(psram): support 16Mbit PSRAM for esp32
2020-07-20 12:21:32 +08:00
chenjianqiang
bff6b5b70e
bugfix(psram): configure MMU after PSRAM initialization
2020-07-20 12:21:32 +08:00
Angus Gratton
04ae56806c
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 15:26:58 +10:00
Anton Maklakov
afbaf74007
tools: Mass fixing of empty prototypes (for -Wstrict-prototypes)
2019-08-01 16:28:56 +07:00
Angus Gratton
ddbd09eb15
esp32/esp32s2beta: Extract common SPIRAM options into esp_commmon component
2019-06-11 13:07:37 +08:00
Roland Dobai
0ae53691ba
Rename Kconfig options (components/esp32)
2019-05-21 09:09:01 +02:00
morris
c159984264
separate rom from esp32 component to esp_rom
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1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
2019-03-21 18:51:45 +08:00
morris
956c25dedd
move esp32 chip specific includes to esp32/xxx.h
2019-03-18 17:14:05 +08:00
Wang Jia Lin
a62cbfec9a
Merge branch 'bugfix/fix_psram_eid' into 'master'
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bugfix(psram): fix psram size acquisition method, support esp32-pico chips
See merge request idf/esp-idf!3750
2019-01-15 17:44:51 +08:00
Angus Gratton
e1a1c7f17c
psram: Use 8-bit type for _ext_ram_bss_start/_ext_ram_bss_end
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Fixes pointer arithmetic when printing size of remaining heap
2018-12-20 01:40:05 +00:00
chenjianqiang
a0beff99d2
bugfix(psram): fix psram size acquisition method
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1. Use BIT[7:5] of EID to determine psram size
2. Add ID support for 16Mbit psram
3. Remove module reset on SPI1
4. Confirmed with the vendor that only the old 32Mbit psram need special clock timing. For other psram chips, we should use standard QPI mode.
2018-11-28 17:05:37 +08:00
morris
b6d7675e60
ethernet: fix some bugs in phy&mac driver
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1. Original register mapping for LAN8720 has some registers that doesn't exist/support.
So just remove them, and fix the power and init function for LAN8720.
2. GPIO16 and GPIO17 is occupied by PSRAM, so only ETH_CLOCK_GPIO_IN mode is supported in that case if using PSRAM.
3. Fix bug of OTA failing with Ethernet
4. Fix bug of multicast with Ethernet
Closes https://github.com/espressif/esp-idf/issues/2564
Closes https://github.com/espressif/esp-idf/issues/2620
Closes https://github.com/espressif/esp-idf/issues/2657
2018-11-06 11:07:22 +08:00
Jeroen Domburg
81e35a142a
Spiram: Add option to reserve MMU banks; add himem API to make use of those banks
2018-10-15 14:32:58 +08:00
Angus Gratton
31cf117404
Merge branch 'feature/bss_seg_in_external_memory' into 'master'
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memory: support .bss segment can be in psram
See merge request idf/esp-idf!2236
2018-10-10 14:40:21 +08:00
chenjianqiang
a10b7e892c
bugfix(psram): fix psram driver
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1. remove use EID to distinguish psram voltage
2. 1V8 64Mbit psram and 3V3 64Mbit psram use the same psram driver(standard spi interface)
3. set cs hold time register as 1
2018-10-08 19:55:13 +08:00
TianZhongXing
974112378b
feature: allow .bss segment in external memory
2018-09-21 16:20:26 +08:00
Angus Gratton
c4ed9d15f7
heap: Drop priority of DMA reserved memory pool
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Ensures that non-reserved memory should be used up first, before allocating from this pool.
2018-08-30 06:18:18 +00:00
Angus Gratton
4f227a4ce3
Merge branch 'bugfix/spiram_malloc_reserve_internal_fragments' into 'master'
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esp32: Allow SPIRAM_MALLOC_RESERVE_INTERNAL to span multiple regions of memory
See merge request idf/esp-idf!2891
2018-08-16 11:19:39 +08:00
Angus Gratton
304e9085eb
esp32: Allow SPIRAM_MALLOC_RESERVE_INTERNAL to span multiple regions of memory
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- Allocate this pool after main_task is running, so it can use startup stack RAM
- Raise the maximum allowed value in KConfig to 256KB
- Based on forum discussions https://esp32.com/viewtopic.php?f=2&t=6550&sid=76cd27bda76c6d0e83d3fcc9ec30c650&start=10#p28253
2018-07-31 15:17:07 +10:00
Wangjialin
6e9c59bfc3
feature(psram): add support for 64MBit psram of 1.8v and 3.3v.
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1. Add reading psram EID.
2. Configure different clock mode for different EID.
3. add API to get psram size and voltage.
4. Remove unnecessary VSPI claim.
For 32MBit@1.8V and 64MBit@3.3V psram, there should be 2 extra clock cycles after CS get high level.
For 64MBit@1.8 psram, we can just use standard SPI protocol to drive the psram. We also need to increase the HOLD time for CS in this case.
EID for psram:
32MBit 1.8v: 0x20
64MBit 1.8v: 0x26
64MBit 3.3v: 0x46
2018-07-10 14:24:59 +08:00
Jeroen Domburg
dc864c4108
Add option to continue running (with less ram) if psram is enabled but not detected
2018-02-12 13:44:11 +08:00
Ivan Grokhotkov
90bbcbcdc0
unit tests: fix warnings, build with -Werror
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- libsodium: silence warnings
- unit tests: fix warnings
- spiram: fix warnings
- ringbuf test: enable by default, reduce delays
2017-10-19 21:35:23 +08:00
Ivan Grokhotkov
1da3204a7c
spiram: expose function to initialize SPI RAM cache
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Some frameworks based on ESP-IDF need to be able to decide whether to
initialize SPI RAM after the application has started. This change splits
out part of esp_spiram_init which manipulate cache MMU into a separate
function. Applications can disable cache, call esp_spiram_init_cache,
re-enable cache, and then call esp_spiram_init.
Disabling and re-enabling the cache can be achieved using functions
provided in esp_spi_flash.h.
2017-10-16 09:15:11 +08:00
Jeroen Domburg
740f8a79f0
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
Jeroen Domburg
875ae6a134
Add option to allocate external RAM using heap_alloc_caps
2017-09-14 10:47:44 +08:00
Jeroen Domburg
34372a091c
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00