alex/esp-idf
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79 Commits

Author SHA1 Message Date
KonstantinKondrashov
b7237ff0e6 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-12 18:25:07 +05:00
Darian Leung
07291fdd27 TWAI: FIFO overrun handling and errata workarounds 
This commit adds handling for FIFO overruns and
adds workarounds for HW errats on the ESP32.

Closes https://github.com/espressif/esp-idf/issues/2519
Closes https://github.com/espressif/esp-idf/issues/4276
 2021-04-26 19:35:13 +08:00
chaijie
e8282fb5c5 esp32s2/esp32s3/esp32c3: Decrease boot up time by delete useless slow clock calibration 2021-04-21 11:38:26 +00:00
fuzhibo
e310fb1393 fix: reduce the consumption of touch sensor during deep sleep 2021-04-12 12:24:53 +08:00
Michael (XIAO Xufeng)
76ff1724b3 Merge branch 'feature/remove_hspi_macor_on_chips_later_than_s2_v4.3' into 'release/v4.3' 
spi: remove hspi macor on chips later than s2 (v4.3)

See merge request espressif/esp-idf!12956
 2021-04-08 09:37:07 +00:00
Armando
670b057b04 spi: remove HSPI macro on esp32c3 and esp32s3 2021-04-06 15:30:28 +08:00
Marius Vikhammer
c9087c205b docs: updated system api-reference chapters for C3 2021-03-30 14:28:02 +08:00
Jiang Jiang Jian
dbb632fe34 Merge branch 'bugfix/fix_smartconfig_issue_v4.3' into 'release/v4.3' 
esp_wifi: Fix the second distribution network failure of smartconfig (backport v4.3)

See merge request espressif/esp-idf!12685
 2021-03-11 14:28:52 +00:00
Li Shuai
37946ab300 deep sleep: power down wifi and bt during deep sleep 2021-03-11 07:32:30 +00:00
Marius Vikhammer
fb82bdb9da docs: update api-reference chapters for C3 
Checked and updated the following chapters:
 * api-reference/network
 * api-reference/protocols
 * api-reference/provisioning
 * api-reference/storage
 * api-reference/peripherals/ds
 * api-reference/peripherals/hmac
 * api-reference/peripherals/secure_element
 2021-03-02 15:00:56 +08:00
Xia Xiaotian
9aae8e0ce3 esp_wifi: synchronize Wi-Fi adapter between different chips 
Support preferring to allocate Wi-Fi memory from PSRAM on ESP32-S3

Support Wi-Fi TX cache buffer on ESP32-S3
 2021-02-26 16:34:23 +08:00
Xia Xiaotian
e5e47ebae6 esp_wifi: store PHY digital registers before disabling PHY and load 
them after enabling PHY
 2021-02-26 16:34:10 +08:00
Angus Gratton
ae165c9b52 Merge branch 'bugfix/esp32s2_rom_address_range' into 'master' 
soc: Fix SOC_IROM_MASK_HIGH address

Closes IDF-2672

See merge request espressif/esp-idf!12126
 2021-01-28 13:49:27 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
 2021-01-27 08:44:03 +01:00
Michael (XIAO Xufeng)
c99e891201 Merge branch 'feature/sync_adc_changes_from_c3_to_master_last' into 'master' 
adc: sync adc changes from c3 to master (last time)

Closes IDF-2694

See merge request espressif/esp-idf!12134
 2021-01-26 12:52:20 +08:00
Michael (XIAO Xufeng)
2b83418141 adc: add fallback calibration method 
Also:
1. Separate static configuration into init phase to improve
performance
2. Add a init code config layer to avoid duplicated configuration
3. Add a HW_CALIBRATION_V1 caps
 2021-01-25 20:30:42 +08:00
Michael (XIAO Xufeng)
7a20ea5f0e Merge branch 'feature/support_flash_sus_res_c3' into 'master' 
spi_flash: Add flash auto-suspend auto-resume mode on esp32c3

Closes IDF-2591

See merge request espressif/esp-idf!11888
 2021-01-25 17:41:32 +08:00
Darian Leung
1fabfd005b soc: Fix SOC_IROM_MASK_HIGH address 
The high address limit IROM on the esp32s2 is incorrect, thus
causing backtrace printing to think valid function PCs are invalid.
 2021-01-25 14:54:25 +08:00
Michael (XIAO Xufeng)
d7d1dee208 system: reset dma when soft reset 2021-01-25 04:51:40 +00:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
KonstantinKondrashov
afef16c2e9 spi_flash: Support suspend/resume mode for operations 
- Adds arbitration between the erase and write in suspend mode
     (If the flash memory is suspended then only a read operation can be performed.)
- espcoredump: Dump does not use suspend feature, just resume before continue.
- spi_flash: Add release_cpu() to do suspend/release_cpu/resume
 2021-01-25 11:13:38 +08:00
Michael (XIAO Xufeng)
68034a5149 Merge branch 'bugfix/soc_rtcperi_rtcldo' into 'master' 
fix rtc peripheral wakeup fail bug & clear rtc regulator force on configuration when in deepsleep

See merge request espressif/esp-idf!9709
 2021-01-22 16:55:55 +08:00
Michael (XIAO Xufeng)
a08265aad8 Merge branch 'bugfix/fix_x32k_config_param' into 'master' 
esp32s2/esp32s3: Improve 32k xtal startup time

See merge request espressif/esp-idf!11836
 2021-01-22 16:42:54 +08:00
Angus Gratton
3532f52f60 Merge branch 'bugfix/ldgen_ignore_nonexistent_archives_and_obj' into 'master' 
ldgen: check mappings

Closes IDF-1624

See merge request espressif/esp-idf!8557
 2021-01-21 15:59:35 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master' 
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
 2021-01-21 08:42:49 +08:00
chaijie
f6c61544ae esp32s2/esp32s3: Improve 32k xtal startup time 2021-01-20 03:51:21 +00:00
chaijie
7cf32b4387 esp32s2: Fix wakeup fail issue when pd peripheral in lightsleep. 
esp32s2: fix wrong deepsleep configuration issue.

1. if RTC_CK8M_ENABLE_WAIT_DEFAULT set to 1, rtc peripherals will not poweron successfully if pd peripherals in light_sleep, the minimum RTC_CK8M_ENABLE_WAIT_DEFAULT is RTC_POWERUP_CYCLES + RTC_WAIT_CYCLES + 2;
2. when goto deepsleep after lightsleep waking up, rtc regulator should not force pu.
 2021-01-20 03:51:07 +00:00
KonstantinKondrashov
88c5fe49b8 soc: Adds a soc_caps define for all chips to define the number of boot key digests 2021-01-19 20:51:13 +08:00
Li Shuai
aa7fd175b9 light sleep: light sleep support for esp32c3 2021-01-19 14:50:58 +08:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
ninh
27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
Marius Vikhammer
0713e93b8f TWAI: bringup for S3 and C3 2021-01-14 20:30:31 +08:00
morris
e6d23a35ec gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues 
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
 2021-01-10 16:16:28 +08:00
ninh
dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
Marius Vikhammer
eb788deb03 esp_hw_support: merge C3 changes to master 
Merge RTC related C3 changes to master
 2020-12-30 12:20:41 +08:00
Angus Gratton
1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master' 
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
 2020-12-29 11:41:05 +08:00
Darian Leung
602a747b31 Add USB Host registers and types and LL layer 
This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
 2020-12-24 19:43:42 +08:00
Angus Gratton
c3ba995f2c Merge branch 'ci/ccomp_performance_tests' into 'master' 
unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
 2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips 
Closes IDF-2503
 2020-12-24 09:46:35 +05:30
Angus Gratton
fa892eb017 soc: Explain units for rtc_clk_cal() function, fix typo 2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df rtc: add function to en/disable the rtc clock 2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
 2020-12-22 18:56:24 +11:00
Cao Sen Miao
0736c91d68 soc: Remove cache constants from soc.h 2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer 
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
 2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d soc: Add initial ESP32-C3 support 
From internal commit 7761d6e8
 2020-11-30 11:12:56 +11:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
Michael (XIAO Xufeng)
099fca515d Merge branch 'bugfix/move_crypto_caps' into 'master' 
SHA/RSA: moved all caps to soc_caps.h

Closes IDF-2300

See merge request espressif/esp-idf!11032
 2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62 Merge branch 'feature/riscv_arch' into 'master' 
Add RISC-V support

Closes IDF-2359

See merge request espressif/esp-idf!11140
 2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00