Commit Graph

17 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
c796bd5e63 esp_flash: refactor to make host driver function a const table
This is also part of ESP32-S3 ROM changes
2020-07-13 03:10:00 +08:00
Michael (XIAO Xufeng)
a9c8895bb2 esp_flash: refactor to be compatible with the latest ROM
Including:
1. Change the write bytes/read bytes parameter in the host driver into slicers to meet the requirements of complicated cases.
2. Refactor the esp_flash_api code a bit so that we can use the code in the ROM laster
3. Provide get_temp_buffer and release_temp_buffer in the os_functions when the buffer passed by application cannot be used directly.
4. Make timeout of operations configurable in the chip_driver.
5. Make dummy number configurable.
2020-07-12 02:09:45 +08:00
Ivan Grokhotkov
03bb2774d9 spi_flash: don't call vTaskDelay in non-os context
Fixes regression in core dump, when a crash happens in interrupt
context.
2020-06-02 15:42:24 +02:00
Michael (XIAO Xufeng)
651eb1a694 esp_flash: fix the write performance regression
Also changed internal delay unit into microsecond.
2020-05-17 22:06:02 +08:00
Angus Gratton
fb340940d3 spi_flash: Fix over-allocation and OOM crash when reading from SPI flash to PSRAM buffers
Previously would try allocate buffer of minimum size 16KB not maximum size 16KB, causing
out of memory errors for any large reads, or if less than 16KB contiguous free heap.

Also, if using legacy API and internal allocation failed then implementation would abort()
instead of returning the error to the caller.

Added test for using large buffers in PSRAM.

Closes https://github.com/espressif/esp-idf/issues/4769

Also reported on forum: https://esp32.com/viewtopic.php?f=13&t=14304&p=55972
2020-03-03 00:17:27 +00:00
Michael (XIAO Xufeng)
eb104aa16f esp_flash: fix the quad issue for some GD flash chips
The GD flash with product ID 40H, is already used in Wrover-nosufix modules.
2019-10-14 17:25:59 +08:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng)
511820820e esp_flash: fix the coredump issue
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
2019-09-14 17:01:36 +08:00
Michael (XIAO Xufeng)
6139864a4c esp_flash: fix coredump for legacy spi flash API
When legacy mode is used, the coredump still fails during linking
because "esp_flash_init_default_chip", "esp_flash_app_init" and
"esp_flash_default_chip " are not compiled and linked.

Instead of using ``if`` macros in callers, these functions are protected
by ``if`` macros in the header, and also not compiled in the sources.
"esp_flash_default_chip" variable is compiled with safe default value.
2019-09-14 16:56:31 +08:00
Michael (XIAO Xufeng)
d008c47dac esp_flash: add support for encrypted read and write
Using legacy implementation.
2019-09-12 12:41:50 +08:00
Michael (XIAO Xufeng)
e5704ab1a8 esp_flash: fix the set/get write protection functions
Add support for get write protection support, fixed the duplicated
set_write_protection link.

All the write_protection check in the top layer are removed. The lower
levels (chip) should ensure to disable write protection before the
operation start.
2019-08-08 23:18:00 +08:00
Anton Maklakov
afbaf74007 tools: Mass fixing of empty prototypes (for -Wstrict-prototypes) 2019-08-01 16:28:56 +07:00
Michael (XIAO Xufeng)
d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
Michael (XIAO Xufeng)
37cb673cd7 esp_flash: update the document to the latest API 2019-06-20 11:50:23 +08:00
Ivan Grokhotkov
026533cd72 esp_flash: fix C++ compilation and some typos 2019-06-20 10:55:13 +08:00
Michael (XIAO Xufeng)
caf121e4b6 esp_flash: break the inappropriate include chain in spi_flash_host_drv.h 2019-06-20 10:55:12 +08:00
Michael (XIAO Xufeng)
1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00