Commit Graph

7 Commits

Author SHA1 Message Date
Ivan Grokhotkov
fcccec4a3b Merge branch 'master' into feature/btdm_controller
* master: (32 commits)
  components/nghttp: rename Makefile to component.mk
  components/nghttp: add HTTP2.0 protocol feature
  compoenents/esp32: don't alias start_cpu1 to start_cpu0_default
  components/freertos: fix a bug with an uninitialised return value
  Change application entry point name back to app_main
  gitlab-ci: build SSC with matching branch name, if available
  components/spi_flash: remove stray level of indentation
  components/nvs: fix broken sentences in comment blocks
  components/esp32: fix renaming of esp_event_set_cb, minor clean up
  components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
  Fix a spelling mistake in panic message, add carriage return to stack canary message
  components/lwip,esp32: fixes for C++
  components/bt: fix compilation, remove ./ from makefile
  components/esp32: clarify type of queue in wifi_init_config_t, add default init macro
  components/esp32: add ESP_ERROR_CHECK
  Event handling refactoring
  clean up warnings
  components/esp32,bt: fix typos in comments
  Startup flow refactoring
  Roll back submodule version
  ...
2016-09-27 12:40:56 +08:00
wangmengyang
b9167f70cd component/bt: add VHCI mutex protetion
1. add mutex to VHCI APIs
2. remove bss/data log print during initialization;
3. add bss/data symbols in esp32.rom.ld
4. add & modify BTDM OSI functions
2016-09-26 18:52:15 +08:00
Ivan Grokhotkov
b936441b9b Startup flow refactoring
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
2016-09-26 00:50:57 +08:00
Ivan Grokhotkov
ff2750ab07 components/esp32: move peripheral symbols to separate ld script 2016-09-19 15:05:32 +08:00
Wangjialin
489b4f31a9 add peripheral module struct headers 2016-09-18 03:14:18 +08:00
jack
24011ddd05 header files: modify rom code and soc header files
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
2016-09-12 17:47:49 +08:00
Wu Jian Gang
c3102e8fb2 ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld 2016-08-25 11:07:53 +08:00