Prior to this commit, we don't consider the offset of the irom vaddr
start.
If the offset + size is bigger than the MMU page size, for example:
MMU page size: 0x10000
irom vaddr: 0x4200_0800, so offset = 0x800
irom size: 0xF900
offset + size = 0x10100
Under this condition, the 0x4200_0000 ~ 0x4202_0000, two MMU pages are
used.
With this commit, when reserving the irom and drom, we take the offset
into consideration as well.
Closes https://github.com/espressif/esp-idf/issues/2561
* Some components have initialization dependencies. To account for
them, simple numeric priority values are introduced.
* esp_system_init_fn_array moved into Flash from DRAM
* System init functions defined using ESP_SYSTEM_INIT_FN now return
an error code. This enables simpler and more consistent error
handling in the init functions. Returning an error from an init
function is now a valid approach — the startup code will print
an error and abort.
The change fixes thread-local-storage size by removing .srodata section
from it. It initially was included in TLS section by mistake.
The issue was found when stack size increased after building applications
with GCC-11.1 compiler. Stack size became bigger because some new data
appeared in .srodata. See more details here:
adce62f53d
ESP32H2 doesn't support access to RTC memory through various buses, thus .rtc.dummy section
makes no sense here. The section is used for blind padding in LD script - to provide proper section offsets)
PMS aware chips require prefetch padding size for instruction fetch, or
some memory alignment considerations. These settings are now exposed
through kconfig options (hidden) and used through common ld template.
This shall help to add and manage future chips support easily for
these considerations.
Closes IDF-3624
