- Added config to disable scan backoff
- Fixed llm_scan.c assert at line 1485 during controller deinit if duplicate scan is not stopped
- Call pll track in controller task
Due to SMP, critical sections have been added to xTaskIncrementTick() and
vTaskSwitchContext() (to take the xKernelLock). However, this is technically
not necessary when building for single-core as FreeRTOS expect these funcitons
to be called with interrupts already disabled.
This commit makes the critical secitons in those functions depend on
"configNUM_CORES > 1", and ensures that interrupts are disabled when calling
those functions. This effectively restores the vanilla behavior for these
functions when building for single-core.
In IDF FreeRTOS, when building for SMP, there are numerous functions
which require different critical sections when compared to single-core. This
commit encapsulates those difference into a common set of macros whose
behavior depends on "configNUM_CORES > 1". As such...
- Vanilla behavior has been restored for some functions when building for
single core (i.e., used to call taskENTER_CRITICAL, now disables interrupts
mactching vanilla behavior).
- Reduces number of "#ifdef (configNUM_CORES > 1)" in functions
- Any SMP only critical sections are now wrapped by
"#ifdef (configNUM_CORES > 1)" and properly documented via comments.
This commit removes all kconfig_new files and references to them and adds esp-idf-kconfig as a dependency and adequate wrappers to avoid breaking changes.
For simultaneous HTTP and HTTPS server use-case, default configurations
set same control socket port and hence one of the server initialization
fails with an error "error in creating control socket".
This commit modifies default initializers to use different control
socket port in HTTP vs HTTPS server case.
Closes https://github.com/espressif/esp-idf/issues/10160
Closes IDFGH-8719
- Move {target}/rom/miniz.h to common miniz.h
- Add ESP_ROM_HAS_MZ_CRC32 for ESP32/S2/S3/C3/H4
- Alias mz_crc32 to crc32_le if chips not support ESP_ROM_HAS_MZ_CRC32
Closes https://github.com/espressif/esp-idf/issues/10177
The portDISABLE_INTERRUPTS() macro on Xtensa should return only the interrupt
mask/level before the interrupts were disabled. Previously, the entire contents
of PS register were returned (i.e., direct return from RSIL instruction without
any bit masking or shifting).
This commit fixes the portDISABLE_INTERRUPTS() macro to return the INTLEVEL
bitfield of the PS register.
The sections details that only 160KB of DRAM can be used for statically allocated data.
Reference this new section in mem_alloc.rst and memory-types.rst.
I'm including <hal/uart_ll.h> in my C++ application because I need to
bypass the uart driver. The inline functions in the header file fail to
compile as C++.
All of the enums need explicit casts for conversion to/from integers.
Merges https://github.com/espressif/esp-idf/pull/10106
