Commit Graph

18 Commits

Author SHA1 Message Date
morris
783e1781bd esp_rom: patch systimer driver for esp32c2 2022-07-25 16:08:52 +08:00
Jing Li
66395a5c00 system/sleep: further fix spi flash/ram current leakage 2022-07-21 19:14:26 +08:00
Michael (XIAO Xufeng)
d5bdf95580 hw_support: fixed regi2c not protected by lock on ESP32S2 2022-03-13 00:24:08 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Cao Sen Miao
d397464fc4 spi_flash: refactor spi_flash.h to esp_rom_spiflash.h but keep the content in spi_flash.h 2021-12-30 14:12:31 +08:00
Cao Sen Miao
b0decda1e3 bootloader: move bootloader flash support to isolate folders 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Cao Sen Miao
bf6fa70812 ESP8684: update bootloader, bootloader_support, esp_rom 2021-11-06 17:33:44 +08:00
SalimTerryLi
23e23b697c
rom/tjpgd: unify library & add rom patch
remove external tjpgd library inside example

enable tjpgd decoding on all chips
2021-09-01 14:42:17 +08:00
Shu Chen
37f4cb8b4b esp32h2: add rom code for esp32h2 2021-07-01 19:53:11 +08:00
Jakob Hasse
e32831033a [esp_rom]: fixed S3 longjmp patch
* On S3, the placement of ROM functions is
  ECO-dependent. Hence, we don't jump into
  the middle of the longjmp function in ROM
  on S3 anymore.
  Instead, the whole longjump function is used
  in the patch.

* Also properly excluded the patch from
  bootloader build with Makefiles

Closes IDF-3391
2021-06-18 15:47:41 +08:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
2021-06-07 10:40:14 +08:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
morris
bf2480f62d efuse: can disable boot ROM log from Kconfig 2021-02-22 20:56:43 +08:00
Renz Bagaporo
14902da344 esp32: move disabling rom log to esp_rom 2020-08-17 19:08:56 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00