8 Commits

Author	SHA1	Message	Date
Cao Sen Miao	ed96dadd06	spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents	2023-05-11 20:10:30 +08:00
C.S.M	6b1d4b4d49	ESP32-H2: Last MR for g0 component support, (only hal left)	2022-12-05 17:32:21 +08:00
laokaiyao	8677216576	esp32h2: renaming esp32h2 to esp32h4	2022-11-08 17:05:33 +08:00
Cao Sen Miao	4418a855ba	spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2	2022-04-26 15:22:37 +08:00
SalimTerryLi	874a720286	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci	2021-08-30 13:50:58 +08:00
Cao Sen Miao	992de2750e	spi_flash: add support for ext flash	2021-07-31 14:11:35 +08:00
Shu Chen	205cd469e9	esp32h2: update driver/hal/soc components to support esp32h2	2021-07-01 19:53:11 +08:00
Shu Chen	983cca8b27	esp32h2: copy driver/hal/soc components from esp32c3 ... Copy the esp32c3 code without any change: * components/driver/esp32h2 * components/esp32h2 * components/hal/esp32h2 * components/soc/esp32h2	2021-07-01 19:53:11 +08:00