alex/esp-idf
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11,894 Commits 20 Branches 148 Tags 384 MiB
release/v4.0
Commit Graph

324 Commits

Author SHA1 Message Date
Renz Bagaporo
8de50b5655 components: fix ldgen check errors 2021-07-13 18:52:40 +10:00
Zim Kalinowski
eec2482ecf Merge branch 'feature/regi2c_add_lock_v4.0' into 'release/v4.0' 
regi2c: add a spinlock for accessing (reg)I2C devices (v4.0)

See merge request espressif/esp-idf!13716
 2021-07-09 07:33:19 +00:00
Cao Sen Miao
e6222ccf60 spi_flash: fix cs line setup to make the flash driver more stable 2021-06-08 01:02:39 +08:00
Omar Chebib
8d1f243bff regi2c: add a spinlock for accessing (reg)I2C devices 
When not compiling bootloader, a spinlock will be used for reading or writing
I2C internal devices/registers.
When compiling for bootloader, no need to use any lock.
 2021-05-25 17:57:07 +08:00
Li Shuai
16546a89e5 deep sleep: optimize sleep current in wifi softap mode 2021-04-29 15:13:47 +08:00
Marius Vikhammer
915305fe61 rtc: increase CI acceptance range for calc 8M test 2021-04-09 15:06:46 +08:00
Michael (XIAO Xufeng)
41efdb0b34 Merge branch 'bugfix/spi_master_multiple_dev_with_diff_cs_lvl_4.0' into 'release/v4.0' 
spi_master: correctly set cs polarity (4.0)

See merge request espressif/esp-idf!10403
 2021-03-10 15:24:06 +00:00
SiLeader
d7c8dd270f fix compiler warning: comparison of integer expressions of different signedness: 'int' and 'unsigned int' 
Merges https://github.com/espressif/esp-idf/pull/5687
Equivalent fix to https://github.com/espressif/esp-idf/issues/6120 for v4.0 branch
 2021-01-19 09:15:52 +11:00
Darian Leung
4741e6787d CAN: Fix size of RX msg count field on the esp32 
This commit fixes the size of the RX message count register field
on the esp32.
 2020-12-02 21:35:07 +08:00
Jiang Jiang Jian
e3db779b95 Merge branch 'bugfix/customer_baidu_psram_stack_backtrace_v4.0' into 'release/v4.0' 
backport v4.0: added psram stack check in backtrace

See merge request espressif/esp-idf!8474
 2020-11-12 21:00:36 +08:00
Wielebny666
fb594f8f5d spi_master: correctly set cs polarity 
All devices must be added to the same spi line before use.
 2020-09-10 16:07:01 +08:00
morris
296104a103 ethernet: set DMA owner after all descriptors have configured 2020-08-20 10:57:41 +08:00
morris
c4fe36dd32 ethernet: handle early rx interrupt 2020-08-20 10:57:41 +08:00
Li Shuai
374ad7d38f added psram stack check in backtrace 2020-08-02 05:27:41 +00:00
Xia Xiaotian
0a2bec85f3 soc: clear PHY status when cpu start 2020-02-13 14:36:11 +08:00
Ivan Grokhotkov
0c2c821f8f Merge branch 'bugfix/esp_ptr_executable_single_core_v4.0' into 'release/v4.0' 
soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory (v4.0)

See merge request espressif/esp-idf!7464
 2020-02-10 16:30:34 +08:00
Angus Gratton
d897e522af soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory 
In single core mode, APP CPU cache region is added to the available range.
 2020-01-29 10:03:30 +11:00
morris
7b128595ac ethernet: optimise tx and rx 2020-01-21 20:51:03 +08:00
Darian Leung
03d5742e11 can: Add support for lower bit rates 
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
 2019-12-16 07:45:38 +00:00
Anton Maklakov
f8e1ee35e2 soc: fix unit tests not included in the build 
Regression from 9eccd7c082
 2019-12-11 15:57:49 +11:00
morris
97defec6cd ethernet:a bunch of bugfix from master 2019-12-03 17:37:35 +08:00
suda-morris
42a462d584 ethernet: add gpio number into config structure 2019-12-03 15:53:39 +08:00
Michael (XIAO Xufeng)
41e64bd79c esp_flash: rename internal variables for better readability 
chip_drv in HAL are renamed as host
 2019-11-21 12:26:14 +08:00
Michael (XIAO Xufeng)
2b7681ec4f esp_flash: fix set qe bit and write command issues 
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
 2019-11-21 12:26:14 +08:00
KonstantinKondrashov
fae116bb2e soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-11-14 12:26:43 +08:00
Ivan Grokhotkov
e5ff431b35 Merge branch 'fix/esp_flash_coredump_4.0' into 'release/v4.0' 
esp_flash: fix coredump issues (backport v4.0)

See merge request espressif/esp-idf!6136
 2019-09-26 21:26:53 +08:00
xiehang
4e7b559101 Delete extra '/' 2019-09-19 19:22:44 +08:00
Jack
9ab92331c4 dport: remove clock_en and reset bitname which is not suitable 2019-09-19 18:49:37 +10:00
Angus Gratton
08416d05ba soc: Remove deprecated LEDC struct register names (bit_num, div_num) 
Deprecated since ESP-IDF V3.0
 2019-09-19 18:49:37 +10:00
Angus Gratton
200c82561a soc: remove deprecated io_mux PIN_PULLxxx_yyy macros 
Deprecated before ESP-IDF V1.0!
 2019-09-19 18:49:37 +10:00
Angus Gratton
a9fe3165c4 soc/pm: Remove deprecated use of rtc_cpu_freq_t enum 
Removes deprecated ways of setting/getting CPU freq, light sleep freqs.

Deprecated since ESP-IDF V3.2
 2019-09-19 18:48:13 +10:00
Michael (XIAO Xufeng)
d3b54ec84a esp_flash: fix the coredump issue 
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
 2019-09-18 14:30:23 +08:00
Jiang Jiang Jian
31be6be147 Merge branch 'fix/esp_flash_set_get_wp_4.0' into 'release/v4.0' 
esp_flash: fix the set/get write protection functions (backport v4.0)

See merge request espressif/esp-idf!5832
 2019-09-08 16:34:40 +08:00
Roland Dobai
1402e78844 Fix error code collision and CI check 2019-09-03 08:07:16 +02:00
Michael (XIAO Xufeng)
a626b26cf9 esp_flash: improve the comments a bit 2019-08-20 14:05:35 +08:00
suda-morris
1b903111b6 efuse: update the scheme of getting chip revision 2019-08-13 14:37:17 +08:00
Michael (XIAO Xufeng)
fa555e3109 esp_flash: fix a compatibility issue working with the ROM 
The esp_flash API has a side effects: it modifies the clock control
registers, and this makes the clock inconsistent with the ROM variable
`g_rom_spiflash_dummy_len_plus`.

This commit helps the ROM to get the correct dummy cycles required by
the latest clock settings. Every device on the SPI1 bus will update the
ROM variable when it modifies the clock registers.
 2019-07-29 03:00:09 +00:00
suda-morris
018de8101f ethernet: can build without enable esp32 emac 
Closes https://github.com/espressif/esp-idf/issues/3770
 2019-07-22 21:07:02 +08:00
Tomer Shefler
97ad2bcb86 ethernet: support giving 50mhz rmii clock with both 40mhz and 26 mhz rtc xtal 
Merges https://github.com/espressif/esp-idf/pull/3769
Closes https://github.com/espressif/esp-idf/pull/3704
 2019-07-22 21:07:02 +08:00
suda-morris
af78311975 ethernet: malloc hal together with driver context 2019-07-22 21:07:02 +08:00
suda-morris
cb42c29252 ethernet: support dm9051 
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
 2019-07-04 19:38:13 +08:00
boarchuz
b0168310db Typo correction 
Merges https://github.com/espressif/esp-idf/pull/3604
 2019-07-02 17:49:49 +08:00
Ivan Grokhotkov
d7d91225d3 Merge branch 'feature/refactor_etherent_driver' into 'master' 
add esp_eth component

Closes IDF-324, IDF-637, and IDFGH-1139

See merge request idf/esp-idf!5111
 2019-06-28 03:44:44 +08:00
Michael (XIAO Xufeng)
d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
suda-morris
90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00
Renz Christian Bagaporo
9b350f9ecc cmake: some formatting fixes 
Do not include bootloader in flash target when secure boot is enabled.
Emit signing warning on all cases where signed apps are enabled (secure
boot and signed images)
Follow convention of capital letters for SECURE_BOOT_SIGNING_KEY
variable, since it is
relevant to other components, not just bootloader.
Pass signing key and verification key via config, not requiring
bootloader to know parent app dir.
Misc. variables name corrections
 2019-06-21 19:53:29 +08:00
Renz Christian Bagaporo
9eccd7c082 components: use new component registration api 2019-06-21 19:53:29 +08:00
Angus Gratton
bd9590502c Merge branch 'bugfix/spi_flash_remove_include_chain_in_host_drv' into 'master' 
esp_flash: support C++ and improve the document

See merge request idf/esp-idf!5287
 2019-06-21 13:12:09 +08:00
Angus Gratton
126b687c75 Merge branch 'refactor/vfs_uart_multichip_support' into 'master' 
vfs_uart & uart: add multichip support

See merge request idf/esp-idf!5298
 2019-06-20 18:31:24 +08:00
chenjianqiang
cf2ba210ef uart: multichip support 2019-06-20 11:32:22 +08:00