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https://github.com/espressif/esp-idf.git
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soc/esp32s2beta: Exclude DPORT check
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KonstantinKondrashov
bot
parent
d4ca0e186d
commit
ffaee97e81
@ -95,61 +95,29 @@
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#ifndef __ASSEMBLER__
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#define IS_DPORT_REG(_r) (((_r) >= DR_REG_DPORT_BASE) && (_r) <= DR_REG_DPORT_END)
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#if !defined( BOOTLOADER_BUILD ) && !defined( CONFIG_FREERTOS_UNICORE ) && defined( ESP_PLATFORM )
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#define ASSERT_IF_DPORT_REG(_r, OP) TRY_STATIC_ASSERT(!IS_DPORT_REG(_r), (Cannot use OP for DPORT registers use DPORT_##OP));
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#else
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#define ASSERT_IF_DPORT_REG(_r, OP)
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#endif
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//write value to register
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#define REG_WRITE(_r, _v) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_WRITE); \
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(*(volatile uint32_t *)(_r)) = (_v); \
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})
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#define REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v)
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//read value from register
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#define REG_READ(_r) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_READ); \
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(*(volatile uint32_t *)(_r)); \
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})
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#define REG_READ(_r) (*(volatile uint32_t *)(_r))
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//get bit or get bits from register
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#define REG_GET_BIT(_r, _b) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_GET_BIT); \
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(*(volatile uint32_t*)(_r) & (_b)); \
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})
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#define REG_GET_BIT(_r, _b) (*(volatile uint32_t*)(_r) & (_b))
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//set bit or set bits to register
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#define REG_SET_BIT(_r, _b) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_SET_BIT); \
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(*(volatile uint32_t*)(_r) |= (_b)); \
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})
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#define REG_SET_BIT(_r, _b) (*(volatile uint32_t*)(_r) |= (_b))
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//clear bit or clear bits of register
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#define REG_CLR_BIT(_r, _b) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_CLR_BIT); \
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(*(volatile uint32_t*)(_r) &= ~(_b)); \
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})
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#define REG_CLR_BIT(_r, _b) (*(volatile uint32_t*)(_r) &= ~(_b))
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//set bits of register controlled by mask
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#define REG_SET_BITS(_r, _b, _m) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_SET_BITS); \
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(*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m))); \
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})
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#define REG_SET_BITS(_r, _b, _m) (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m)))
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//get field from register, uses field _S & _V to determine mask
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#define REG_GET_FIELD(_r, _f) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_GET_FIELD); \
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((REG_READ(_r) >> (_f##_S)) & (_f##_V)); \
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})
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#define REG_GET_FIELD(_r, _f) ((REG_READ(_r) >> (_f##_S)) & (_f##_V))
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//set field of a register from variable, uses field _S & _V to determine mask
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#define REG_SET_FIELD(_r, _f, _v) ({ \
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ASSERT_IF_DPORT_REG((_r), REG_SET_FIELD); \
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(REG_WRITE((_r),((REG_READ(_r) & ~((_f##_V) << (_f##_S)))|(((_v) & (_f##_V))<<(_f##_S))))); \
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})
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#define REG_SET_FIELD(_r, _f, _v) (REG_WRITE((_r),((REG_READ(_r) & ~((_f##_V) << (_f##_S)))|(((_v) & (_f##_V))<<(_f##_S)))))
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//get field value from a variable, used when _f is not left shifted by _f##_S
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#define VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
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@ -170,52 +138,28 @@
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#define FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
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//read value from register
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#define READ_PERI_REG(addr) ({ \
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ASSERT_IF_DPORT_REG((addr), READ_PERI_REG); \
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(*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))); \
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})
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#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
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//write value to register
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#define WRITE_PERI_REG(addr, val) ({ \
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ASSERT_IF_DPORT_REG((addr), WRITE_PERI_REG); \
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(*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val); \
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})
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#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
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//clear bits of register controlled by mask
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#define CLEAR_PERI_REG_MASK(reg, mask) ({ \
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ASSERT_IF_DPORT_REG((reg), CLEAR_PERI_REG_MASK); \
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WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); \
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})
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#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
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//set bits of register controlled by mask
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#define SET_PERI_REG_MASK(reg, mask) ({ \
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ASSERT_IF_DPORT_REG((reg), SET_PERI_REG_MASK); \
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WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); \
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})
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#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
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//get bits of register controlled by mask
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#define GET_PERI_REG_MASK(reg, mask) ({ \
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ASSERT_IF_DPORT_REG((reg), GET_PERI_REG_MASK); \
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(READ_PERI_REG(reg) & (mask)); \
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})
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#define GET_PERI_REG_MASK(reg, mask) (READ_PERI_REG(reg) & (mask))
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//get bits of register controlled by highest bit and lowest bit
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#define GET_PERI_REG_BITS(reg, hipos,lowpos) ({ \
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ASSERT_IF_DPORT_REG((reg), GET_PERI_REG_BITS); \
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((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); \
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})
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#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
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//set bits of register controlled by mask and shift
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#define SET_PERI_REG_BITS(reg,bit_map,value,shift) ({ \
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ASSERT_IF_DPORT_REG((reg), SET_PERI_REG_BITS); \
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(WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) )); \
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})
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#define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) ))
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//get field of register
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#define GET_PERI_REG_BITS2(reg, mask,shift) ({ \
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ASSERT_IF_DPORT_REG((reg), GET_PERI_REG_BITS2); \
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((READ_PERI_REG(reg)>>(shift))&(mask)); \
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})
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#define GET_PERI_REG_BITS2(reg, mask,shift) ((READ_PERI_REG(reg)>>(shift))&(mask))
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#endif /* !__ASSEMBLER__ */
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//}}
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@ -305,7 +249,7 @@
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* 25 4 extern level CACHEERR
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* 26 5 extern level
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* 27 3 extern level Reserved Reserved
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* 28 4 extern edge DPORT ACCESS DPORT ACCESS
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* 28 4 extern edge
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* 29 3 software Reserved Reserved
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* 30 4 extern edge Reserved Reserved
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* 31 5 extern level
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@ -320,7 +264,6 @@
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#define ETS_FRC1_INUM 22
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#define ETS_T1_WDT_INUM 24
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#define ETS_CACHEERR_INUM 25
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#define ETS_DPORT_INUM 28
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//CPU0 Interrupt number used in ROM, should be cancelled in SDK
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#define ETS_SLC_INUM 1
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