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esp32c6: add spi_flash support

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This commit is contained in:
wuzhenghui 2022-07-12 21:19:35 +08:00 committed by Song Ruo Jing
parent 23e37393a7
commit ff8dd1e1a8
30 changed files with 133 additions and 42 deletions
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5
components/esptool_py/project_include.cmake
View File

@ -46,7 +46,10 @@ set(MMU_PAGE_SIZE ${CONFIG_MMU_PAGE_MODE})
if(NOT BOOTLOADER_BUILD)
list(APPEND esptool_elf2image_args --elf-sha256-offset 0xb0)
if(CONFIG_IDF_TARGET_ESP32C2)
# For chips that support configurable MMU page size feature
# If page size is configured to values other than the default "64KB" in menuconfig,
# then we need to pass the actual size to flash-mmu-page-size arg
if(NOT MMU_PAGE_SIZE STREQUAL "64KB")
list(APPEND esptool_elf2image_args --flash-mmu-page-size ${MMU_PAGE_SIZE})
endif()
endif()

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@ -523,10 +523,6 @@ config SOC_SPI_SUPPORT_SLAVE_HD_VER2
bool
default y
config SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT
bool
default y
config SOC_MEMSPI_IS_INDEPENDENT
bool
default y

3
components/soc/esp32c6/include/soc/soc_caps.h
View File

@ -289,9 +289,6 @@
// host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2,
#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id) ({(void)host_id; 1;})
// Peripheral supports output given level during its "dummy phase"
#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT 1
#define SOC_MEMSPI_IS_INDEPENDENT 1
#define SOC_SPI_MAX_PRE_DIVIDER 16

7
components/spi_flash/Kconfig
View File

@ -53,14 +53,9 @@ menu "SPI Flash driver"
to flash on ESP32-D2WD; (2) main SPI flash is connected to non-default pins; (3) main
SPI flash chip is manufactured by ISSI.
config SPI_FLASH_HAS_ROM_IMPL
bool
depends on IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
default y if IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
config SPI_FLASH_ROM_IMPL
bool "Use esp_flash implementation in ROM"
depends on SPI_FLASH_HAS_ROM_IMPL
depends on ESP_ROM_HAS_SPI_FLASH
default n
help
Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF.

28
components/spi_flash/cache_utils.c
View File

@ -36,6 +36,10 @@
#include "esp32c2/rom/cache.h"
#include "soc/extmem_reg.h"
#include "soc/ext_mem_defs.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/cache.h"
#include "soc/extmem_reg.h"
#include "soc/ext_mem_defs.h"
#endif
#include "esp_rom_spiflash.h"
#include <soc/soc.h>
@ -70,6 +74,14 @@ static void spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state);
static uint32_t s_flash_op_cache_state[2];
#if CONFIG_IDF_TARGET_ESP32C6
/* esp32c6 does not has a register indicating if cache is enabled
* so we use s static data to store to state of cache, every time
* disable/restore api is called, the state will be updated
*/
static volatile DRAM_ATTR bool s_cache_enabled = 1;
#endif
#ifndef CONFIG_FREERTOS_UNICORE
static SemaphoreHandle_t s_flash_op_mutex;
static volatile bool s_flash_op_can_start = false;
@ -372,6 +384,11 @@ static void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_st
uint32_t icache_state;
icache_state = Cache_Suspend_ICache() << 16;
*saved_state = icache_state;
#elif CONFIG_IDF_TARGET_ESP32C6
uint32_t icache_state;
icache_state = Cache_Suspend_ICache();
*saved_state = icache_state;
s_cache_enabled = 0;
#endif
}
@ -396,6 +413,9 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta
Cache_Resume_ICache(saved_state >> 16);
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
Cache_Resume_ICache(saved_state >> 16);
#elif CONFIG_IDF_TARGET_ESP32C6
Cache_Resume_ICache(saved_state);
s_cache_enabled = 1;
#endif
}
@ -410,6 +430,8 @@ IRAM_ATTR bool spi_flash_cache_enabled(void)
bool result = (REG_GET_BIT(EXTMEM_PRO_ICACHE_CTRL_REG, EXTMEM_PRO_ICACHE_ENABLE) != 0);
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
bool result = (REG_GET_BIT(EXTMEM_ICACHE_CTRL_REG, EXTMEM_ICACHE_ENABLE) != 0);
#elif CONFIG_IDF_TARGET_ESP32C6
bool result = s_cache_enabled;
#endif
return result;
}
@ -523,7 +545,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable
int i;
bool flash_spiram_wrap_together, flash_support_wrap = true, spiram_support_wrap = true;
uint32_t drom0_in_icache = 1;//always 1 in esp32s2
#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
drom0_in_icache = 0;
#endif
@ -912,7 +934,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable
}
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
static IRAM_ATTR void esp_enable_cache_flash_wrap(bool icache)
{
@ -954,7 +976,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable)
}
return ESP_OK;
}
#endif // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#endif // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
void IRAM_ATTR spi_flash_enable_cache(uint32_t cpuid)
{

91
components/spi_flash/esp32c6/flash_ops_esp32c6.c
View File

@ -0,0 +1,91 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <sys/param.h>
#include "spi_flash_mmap.h"
#include "soc/soc_memory_layout.h"
#include "esp32c6/rom/cache.h"
#include "hal/spi_flash_hal.h"
#include "esp_flash.h"
#include "esp_log.h"
#include "esp_attr.h"
#include "esp_rom_spiflash.h"
#include "esp_private/spi_flash_os.h"
#define SPICACHE SPIMEM0
#define SPIFLASH SPIMEM1
#define FLASH_WRAP_CMD 0x77
esp_err_t spi_flash_wrap_set(spi_flash_wrap_mode_t mode)
{
uint32_t reg_bkp_ctrl = SPIFLASH.ctrl.val;
uint32_t reg_bkp_usr = SPIFLASH.user.val;
SPIFLASH.user.fwrite_dio = 0;
SPIFLASH.user.fwrite_dual = 0;
SPIFLASH.user.fwrite_qio = 1;
SPIFLASH.user.fwrite_quad = 0;
// SPIFLASH.ctrl.fcmd_dual = 0; // TODO: IDF-5333
SPIFLASH.ctrl.fcmd_quad = 0;
SPIFLASH.user.usr_dummy = 0;
SPIFLASH.user.usr_addr = 1;
SPIFLASH.user.usr_command = 1;
SPIFLASH.user2.usr_command_bitlen = 7;
SPIFLASH.user2.usr_command_value = FLASH_WRAP_CMD;
SPIFLASH.user1.usr_addr_bitlen = 23;
SPIFLASH.addr = 0;
SPIFLASH.user.usr_miso = 0;
SPIFLASH.user.usr_mosi = 1;
SPIFLASH.mosi_dlen.usr_mosi_bit_len = 7;
SPIFLASH.data_buf[0] = (uint32_t) mode << 4;;
SPIFLASH.cmd.usr = 1;
while (SPIFLASH.cmd.usr != 0)
{ }
SPIFLASH.ctrl.val = reg_bkp_ctrl;
SPIFLASH.user.val = reg_bkp_usr;
return ESP_OK;
}
esp_err_t spi_flash_enable_wrap(uint32_t wrap_size)
{
CLEAR_PERI_REG_MASK(SPI_MEM_CTRL2_REG(0), SPI_MEM_SPLIT_TRANS_EN_M); // TODO: IDF-5333 Newly added
switch (wrap_size) {
case 8:
return spi_flash_wrap_set(FLASH_WRAP_MODE_8B);
case 16:
return spi_flash_wrap_set(FLASH_WRAP_MODE_16B);
case 32:
return spi_flash_wrap_set(FLASH_WRAP_MODE_32B);
case 64:
return spi_flash_wrap_set(FLASH_WRAP_MODE_64B);
default:
return ESP_FAIL;
}
}
void spi_flash_disable_wrap(void)
{
spi_flash_wrap_set(FLASH_WRAP_MODE_DISABLE);
}
bool spi_flash_support_wrap_size(uint32_t wrap_size)
{
if (!REG_GET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FREAD_QIO) || !REG_GET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FASTRD_MODE)) {
return ESP_FAIL;
}
switch (wrap_size) {
case 0:
case 8:
case 16:
case 32:
case 64:
return true;
default:
return false;
}
}

4
components/spi_flash/esp_flash_spi_init.c
View File

@ -104,7 +104,7 @@ esp_flash_t *esp_flash_default_chip = NULL;
.input_delay_ns = 0,\
.cs_setup = 1,\
}
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
#if !CONFIG_SPI_FLASH_AUTO_SUSPEND
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI1_HOST,\
@ -332,7 +332,7 @@ esp_err_t esp_flash_init_default_chip(void)
const esp_rom_spiflash_chip_t *legacy_chip = &g_rom_flashchip;
memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32C2
#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6
// For esp32s2 spi IOs are configured as from IO MUX by default
cfg.iomux = esp_rom_efuse_get_flash_gpio_info() == 0 ? true : false;
#endif

2
components/spi_flash/flash_mmap.c
View File

@ -38,6 +38,8 @@
#include "esp32h2/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/cache.h"
#endif
#if CONFIG_SPIRAM

2
components/spi_flash/flash_ops.c
View File

@ -40,6 +40,8 @@
#include "esp32h2/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/cache.h"
#endif
#include "esp_rom_spiflash.h"
#include "esp_flash_partitions.h"

9
components/spi_flash/spi_flash_os_func_noos.c
View File

@ -26,6 +26,9 @@
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/ets_sys.h"
#include "esp32c6/rom/cache.h"
#endif
#include "esp_attr.h"
@ -37,7 +40,7 @@ typedef struct {
} spi_noos_arg_t;
static DRAM_ATTR spi_noos_arg_t spi_arg = { 0 };
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
typedef struct {
uint32_t icache_autoload;
} spi_noos_arg_t;
@ -54,7 +57,7 @@ static IRAM_ATTR esp_err_t start(void *arg)
spi_noos_arg_t *spi_arg = arg;
spi_arg->icache_autoload = Cache_Suspend_ICache();
spi_arg->dcache_autoload = Cache_Suspend_DCache();
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
spi_noos_arg_t *spi_arg = arg;
spi_arg->icache_autoload = Cache_Suspend_ICache();
#endif
@ -73,7 +76,7 @@ static IRAM_ATTR esp_err_t end(void *arg)
Cache_Invalidate_ICache_All();
Cache_Resume_ICache(spi_arg->icache_autoload);
Cache_Resume_DCache(spi_arg->dcache_autoload);
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
spi_noos_arg_t *spi_arg = arg;
Cache_Invalidate_ICache_All();
Cache_Resume_ICache(spi_arg->icache_autoload);

1
examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32c2
View File

@ -1450,7 +1450,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32c2
View File

@ -1449,7 +1449,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32c2
View File

@ -1450,7 +1450,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32c2
View File

@ -1448,7 +1448,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32c2
View File

@ -1448,7 +1448,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32c2
View File

@ -1442,7 +1442,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32c2
View File

@ -1446,7 +1446,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32c2
View File

@ -1450,7 +1450,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32c2
View File

@ -1426,7 +1426,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32c2
View File

@ -1426,7 +1426,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set

1
examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32c2
View File

@ -1426,7 +1426,6 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_HAS_ROM_IMPL=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set