diff --git a/components/esp32/cpu_start.c b/components/esp32/cpu_start.c index dc29d3dd18..e70613619e 100644 --- a/components/esp32/cpu_start.c +++ b/components/esp32/cpu_start.c @@ -207,6 +207,17 @@ void IRAM_ATTR call_start_cpu1() } #endif //!CONFIG_FREERTOS_UNICORE +static void intr_matrix_clear(void) +{ + //Clear all the interrupt matrix register + for (int i = ETS_WIFI_MAC_INTR_SOURCE; i <= ETS_CACHE_IA_INTR_SOURCE; i++) { + intr_matrix_set(0, i, ETS_INVALID_INUM); +#if !CONFIG_FREERTOS_UNICORE + intr_matrix_set(1, i, ETS_INVALID_INUM); +#endif + } +} + void start_cpu0_default(void) { esp_setup_syscall_table(); @@ -220,6 +231,7 @@ void start_cpu0_default(void) trax_start_trace(TRAX_DOWNCOUNT_WORDS); #endif esp_clk_init(); + intr_matrix_clear(); #ifndef CONFIG_CONSOLE_UART_NONE uart_div_modify(CONFIG_CONSOLE_UART_NUM, (rtc_clk_apb_freq_get() << 4) / CONFIG_CONSOLE_UART_BAUDRATE); #endif diff --git a/components/esp32/intr_alloc.c b/components/esp32/intr_alloc.c index b35973144c..9686cc7eef 100644 --- a/components/esp32/intr_alloc.c +++ b/components/esp32/intr_alloc.c @@ -96,7 +96,7 @@ const static int_desc_t int_desc[32]={ { 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //2 { 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //3 { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //4 - { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //5 + { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //5 { 1, INTTP_NA, {INT6RES, INT6RES } }, //6 { 1, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //7 { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //8 diff --git a/components/soc/esp32/include/soc/soc.h b/components/soc/esp32/include/soc/soc.h index 218cdf96d7..60a930a8d6 100644 --- a/components/soc/esp32/include/soc/soc.h +++ b/components/soc/esp32/include/soc/soc.h @@ -395,5 +395,7 @@ #define ETS_UART1_INUM 5 //Other interrupt number should be managed by the user +//Invalid interrupt for number interrupt matrix +#define ETS_INVALID_INUM 6 #endif /* _ESP32_SOC_H_ */