From fdac2589bb7778b89463a0fe41ac4a8104d92791 Mon Sep 17 00:00:00 2001 From: morris Date: Wed, 22 Feb 2023 18:54:15 +0800 Subject: [PATCH] driver: improve gpio glitch filter test on esp32c6 and esp32h2, CPU frequency is 2x of IO MUX clock source. There is a possiblity for a too short glitch pulse can't trigger GPIO interrupt. --- .../gpio_extensions/main/test_gpio_filter.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/components/driver/test_apps/gpio_extensions/main/test_gpio_filter.c b/components/driver/test_apps/gpio_extensions/main/test_gpio_filter.c index 31f33e0245..4d90253046 100644 --- a/components/driver/test_apps/gpio_extensions/main/test_gpio_filter.c +++ b/components/driver/test_apps/gpio_extensions/main/test_gpio_filter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -90,8 +90,11 @@ static void test_gpio_intr_callback(void *args) NOINLINE_ATTR IRAM_ATTR static void test_gpio_simulate_glitch_pulse(void) { // the following code is used to generate a short glitch pulse - // around 10ns @CPU160MHz + // around 20ns @CPU160MHz, 40ns @CPU96MHz + // pull high for 4 CPU cycles, to ensure the short pulse can be sampled by GPIO asm volatile( + "csrrsi zero, %0, 0x1\n" + "csrrsi zero, %0, 0x1\n" "csrrsi zero, %0, 0x1\n" "csrrsi zero, %0, 0x1\n" "csrrci zero, %0, 0x1" @@ -101,7 +104,7 @@ NOINLINE_ATTR IRAM_ATTR static void test_gpio_simulate_glitch_pulse(void) TEST_CASE("GPIO flex glitch filter enable/disable", "[gpio_filter]") { - const gpio_num_t test_gpio = 0; + const gpio_num_t test_gpio = 2; printf("initialize GPIO for input and out\r\n"); gpio_config_t gpio_cfg = { @@ -132,15 +135,19 @@ TEST_CASE("GPIO flex glitch filter enable/disable", "[gpio_filter]") .window_width_ns = 500, }; TEST_ESP_OK((gpio_new_flex_glitch_filter(&filter_cfg, &filter))); - TEST_ESP_OK(gpio_glitch_filter_enable(filter)); printf("install gpio interrupt\r\n"); gpio_install_isr_service(0); SemaphoreHandle_t sem = xSemaphoreCreateBinary(); TEST_ESP_OK(gpio_isr_handler_add(test_gpio, test_gpio_intr_callback, sem)); + printf("enable the glitch filter\r\n"); + TEST_ESP_OK(gpio_glitch_filter_enable(filter)); + printf("generate rising edge glitch signal\r\n"); - test_gpio_simulate_glitch_pulse(); + for (int i = 0; i < 10; i++) { + test_gpio_simulate_glitch_pulse(); + } // should timeout, because the glitch is filtered out TEST_ASSERT_EQUAL(pdFALSE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));