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driver: improve gpio glitch filter test
on esp32c6 and esp32h2, CPU frequency is 2x of IO MUX clock source. There is a possiblity for a too short glitch pulse can't trigger GPIO interrupt.
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -90,8 +90,11 @@ static void test_gpio_intr_callback(void *args)
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NOINLINE_ATTR IRAM_ATTR static void test_gpio_simulate_glitch_pulse(void)
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{
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// the following code is used to generate a short glitch pulse
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// around 10ns @CPU160MHz
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// around 20ns @CPU160MHz, 40ns @CPU96MHz
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// pull high for 4 CPU cycles, to ensure the short pulse can be sampled by GPIO
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asm volatile(
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"csrrsi zero, %0, 0x1\n"
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"csrrsi zero, %0, 0x1\n"
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"csrrsi zero, %0, 0x1\n"
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"csrrsi zero, %0, 0x1\n"
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"csrrci zero, %0, 0x1"
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@ -101,7 +104,7 @@ NOINLINE_ATTR IRAM_ATTR static void test_gpio_simulate_glitch_pulse(void)
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TEST_CASE("GPIO flex glitch filter enable/disable", "[gpio_filter]")
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{
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const gpio_num_t test_gpio = 0;
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const gpio_num_t test_gpio = 2;
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printf("initialize GPIO for input and out\r\n");
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gpio_config_t gpio_cfg = {
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@ -132,15 +135,19 @@ TEST_CASE("GPIO flex glitch filter enable/disable", "[gpio_filter]")
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.window_width_ns = 500,
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};
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TEST_ESP_OK((gpio_new_flex_glitch_filter(&filter_cfg, &filter)));
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TEST_ESP_OK(gpio_glitch_filter_enable(filter));
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printf("install gpio interrupt\r\n");
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gpio_install_isr_service(0);
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SemaphoreHandle_t sem = xSemaphoreCreateBinary();
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TEST_ESP_OK(gpio_isr_handler_add(test_gpio, test_gpio_intr_callback, sem));
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printf("enable the glitch filter\r\n");
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TEST_ESP_OK(gpio_glitch_filter_enable(filter));
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printf("generate rising edge glitch signal\r\n");
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test_gpio_simulate_glitch_pulse();
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for (int i = 0; i < 10; i++) {
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test_gpio_simulate_glitch_pulse();
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}
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// should timeout, because the glitch is filtered out
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TEST_ASSERT_EQUAL(pdFALSE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));
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