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esp_gdbstub: refactor code

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This commit is contained in:
Alexey Lapshin 2023-04-02 23:29:27 +08:00
parent 39087f3157
commit fc9c2d704c
27 changed files with 277 additions and 904 deletions
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36
components/esp_gdbstub/CMakeLists.txt
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@ -1,21 +1,23 @@
idf_build_get_property(target IDF_TARGET)
set(srcs "src/gdbstub.c"
"src/gdbstub_transport.c"
"src/packet.c")
idf_component_register(SRCS "src/gdbstub.c" "src/packet.c"
INCLUDE_DIRS "include"
PRIV_INCLUDE_DIRS "private_include"
set(includes "include")
set(priv_includes "private_include")
if(CONFIG_IDF_TARGET_ARCH_XTENSA)
list(APPEND srcs "src/port/xtensa/gdbstub_xtensa.c"
"src/port/xtensa/gdbstub-entry.S"
"src/port/xtensa/xt_debugexception.S")
list(APPEND priv_includes "src/port/xtensa/include")
elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
list(APPEND srcs "src/port/riscv/gdbstub_riscv.c")
list(APPEND priv_includes "src/port/riscv/include")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
PRIV_INCLUDE_DIRS ${priv_includes}
LDFRAGMENTS "linker.lf"
REQUIRES "freertos"
PRIV_REQUIRES "soc" "esp_rom" "esp_system")
if(CONFIG_IDF_TARGET_ARCH_XTENSA)
target_include_directories(${COMPONENT_LIB} PUBLIC "xtensa" "${target}")
target_sources(${COMPONENT_LIB} PRIVATE "xtensa/gdbstub_xtensa.c"
"xtensa/gdbstub-entry.S"
"xtensa/xt_debugexception.S"
"esp_common/gdbstub_common.c")
elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
target_include_directories(${COMPONENT_LIB} PUBLIC "riscv" "${target}")
target_sources(${COMPONENT_LIB} PRIVATE "riscv/gdbstub_riscv.c"
"${target}/gdbstub_${target}.c")
endif()

10
components/esp_gdbstub/esp32/gdbstub_target_config.h
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@ -1,10 +0,0 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* Number of extra TIE defined registers, not listed in the XCHAL */
#define GDBSTUB_EXTRA_TIE_SIZE 0

104
components/esp_gdbstub/esp32c2/gdbstub_esp32c2.c
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@ -1,104 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "soc/soc.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define GDBSTUB_MEM_REGION_COUNT 9
#define UART_REG_FIELD_LEN 0x84
typedef struct {
intptr_t lower;
intptr_t upper;
} mem_bound_t;
static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
{
{SOC_DROM_LOW, SOC_DROM_HIGH},
{SOC_IROM_LOW, SOC_IROM_HIGH},
{SOC_IRAM_LOW, SOC_IRAM_HIGH},
{SOC_DRAM_LOW, SOC_DRAM_HIGH},
{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
// We shouldn't read the uart registers since it will disturb the debugging via UART,
// so skip UART part of the peripheral registers.
{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
};
static inline bool check_inside_valid_region(intptr_t addr)
{
for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
return true;
}
}
return false;
}
void esp_gdbstub_target_init()
{
}
//assume UART gdbstub channel
int esp_gdbstub_getchar()
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
}
return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
}
void esp_gdbstub_putchar(int c)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
;
}
REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
}
void esp_gdbstub_flush()
{
//not needed for uart
}
int esp_gdbstub_readmem(intptr_t addr)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
/* 'addr' may be pointing at the memory which does not allow for
* byte access, such as IRAM.
* Perform a word-aligned read-modify-write, instead of writing
* the byte directly.
*/
unsigned *addr_aligned = (unsigned *)(addr & (~3));
const uint32_t bit_offset = (addr & 0x3) * 8;
const uint32_t mask = ~(0xff << bit_offset);
*addr_aligned = (*addr_aligned & mask) | (data << bit_offset);
return 0;
}

7
components/esp_gdbstub/esp32c2/gdbstub_target_config.h
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@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

140
components/esp_gdbstub/esp32c3/gdbstub_esp32c3.c
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@ -1,140 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "soc/soc.h"
#include "soc/usb_serial_jtag_struct.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define GDBSTUB_MEM_REGION_COUNT 9
#define UART_REG_FIELD_LEN 0x84
typedef struct {
intptr_t lower;
intptr_t upper;
} mem_bound_t;
static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
{
{SOC_DROM_LOW, SOC_DROM_HIGH},
{SOC_IROM_LOW, SOC_IROM_HIGH},
{SOC_IRAM_LOW, SOC_IRAM_HIGH},
{SOC_DRAM_LOW, SOC_DRAM_HIGH},
{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
{SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH},
// RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
// We shouldn't read the uart registers since it will disturb the debugging via UART,
// so skip UART part of the peripheral registers.
{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
};
static inline bool check_inside_valid_region(intptr_t addr)
{
for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
return true;
}
}
return false;
}
void esp_gdbstub_target_init()
{
}
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
int esp_gdbstub_getchar()
{
uint8_t c;
//retry the read until we succeed
while (usb_serial_jtag_ll_read_rxfifo(&c, 1)==0) ;
return c;
}
void esp_gdbstub_putchar(int c)
{
uint8_t cc=c;
//retry the write until we succeed
while (usb_serial_jtag_ll_write_txfifo(&cc, 1)<1) ;
}
void esp_gdbstub_flush()
{
usb_serial_jtag_ll_txfifo_flush();
}
#else
//assume UART gdbstub channel
int esp_gdbstub_getchar()
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
}
return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
}
void esp_gdbstub_putchar(int c)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
;
}
REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
}
void esp_gdbstub_flush()
{
//not needed for uart
}
#endif
int esp_gdbstub_readmem(intptr_t addr)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

7
components/esp_gdbstub/esp32c3/gdbstub_target_config.h
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@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

140
components/esp_gdbstub/esp32c6/gdbstub_esp32c6.c
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@ -1,140 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "soc/soc.h"
#include "soc/usb_serial_jtag_struct.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define GDBSTUB_MEM_REGION_COUNT 9
#define UART_REG_FIELD_LEN 0x84
typedef struct {
intptr_t lower;
intptr_t upper;
} mem_bound_t;
static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
{
{SOC_DROM_LOW, SOC_DROM_HIGH},
{SOC_IROM_LOW, SOC_IROM_HIGH},
{SOC_IRAM_LOW, SOC_IRAM_HIGH},
{SOC_DRAM_LOW, SOC_DRAM_HIGH},
{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
{SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH},
// RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
// We shouldn't read the uart registers since it will disturb the debugging via UART,
// so skip UART part of the peripheral registers.
{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
};
static inline bool check_inside_valid_region(intptr_t addr)
{
for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
return true;
}
}
return false;
}
void esp_gdbstub_target_init()
{
}
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
int esp_gdbstub_getchar()
{
uint8_t c;
//retry the read until we succeed
while (usb_serial_jtag_ll_read_rxfifo(&c, 1)==0) ;
return c;
}
void esp_gdbstub_putchar(int c)
{
uint8_t cc=c;
//retry the write until we succeed
while (usb_serial_jtag_ll_write_txfifo(&cc, 1)<1) ;
}
void esp_gdbstub_flush()
{
usb_serial_jtag_ll_txfifo_flush();
}
#else
//assume UART gdbstub channel
int esp_gdbstub_getchar()
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
}
return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
}
void esp_gdbstub_putchar(int c)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
;
}
REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
}
void esp_gdbstub_flush()
{
//not needed for uart
}
#endif
int esp_gdbstub_readmem(intptr_t addr)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

7
components/esp_gdbstub/esp32c6/gdbstub_target_config.h
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@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

140
components/esp_gdbstub/esp32h2/gdbstub_esp32h2.c
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@ -1,140 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "soc/soc.h"
#include "soc/usb_serial_jtag_struct.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define GDBSTUB_MEM_REGION_COUNT 9
#define UART_REG_FIELD_LEN 0x84
typedef struct {
intptr_t lower;
intptr_t upper;
} mem_bound_t;
static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
{
{SOC_DROM_LOW, SOC_DROM_HIGH},
{SOC_IROM_LOW, SOC_IROM_HIGH},
{SOC_IRAM_LOW, SOC_IRAM_HIGH},
{SOC_DRAM_LOW, SOC_DRAM_HIGH},
{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
{SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH},
// RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
// We shouldn't read the uart registers since it will disturb the debugging via UART,
// so skip UART part of the peripheral registers.
{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
};
static inline bool check_inside_valid_region(intptr_t addr)
{
for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
return true;
}
}
return false;
}
void esp_gdbstub_target_init()
{
}
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
int esp_gdbstub_getchar()
{
uint8_t c;
//retry the read until we succeed
while (usb_serial_jtag_ll_read_rxfifo(&c, 1)==0) ;
return c;
}
void esp_gdbstub_putchar(int c)
{
uint8_t cc=c;
//retry the write until we succeed
while (usb_serial_jtag_ll_write_txfifo(&cc, 1)<1) ;
}
void esp_gdbstub_flush()
{
usb_serial_jtag_ll_txfifo_flush();
}
#else
//assume UART gdbstub channel
int esp_gdbstub_getchar()
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
}
return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
}
void esp_gdbstub_putchar(int c)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
;
}
REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
}
void esp_gdbstub_flush()
{
//not needed for uart
}
#endif
int esp_gdbstub_readmem(intptr_t addr)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

7
components/esp_gdbstub/esp32h2/gdbstub_target_config.h
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@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

139
components/esp_gdbstub/esp32h4/gdbstub_esp32h4.c
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@ -1,139 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "soc/soc.h"
#include "soc/usb_serial_jtag_struct.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
#define GDBSTUB_MEM_REGION_COUNT 9
#define UART_REG_FIELD_LEN 0x84
typedef struct {
intptr_t lower;
intptr_t upper;
} mem_bound_t;
static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
{
{SOC_DROM_LOW, SOC_DROM_HIGH},
{SOC_IROM_LOW, SOC_IROM_HIGH},
{SOC_IRAM_LOW, SOC_IRAM_HIGH},
{SOC_DRAM_LOW, SOC_DRAM_HIGH},
{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
{SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH},
// RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
// We shouldn't read the uart registers since it will disturb the debugging via UART,
// so skip UART part of the peripheral registers.
{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
};
static inline bool check_inside_valid_region(intptr_t addr)
{
for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
return true;
}
}
return false;
}
void esp_gdbstub_target_init()
{
}
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
int esp_gdbstub_getchar()
{
uint8_t c;
//retry the read until we succeed
while (usb_serial_jtag_ll_read_rxfifo(&c, 1)==0) ;
return c;
}
void esp_gdbstub_putchar(int c)
{
uint8_t cc=c;
//retry the write until we succeed
while (usb_serial_jtag_ll_write_txfifo(&cc, 1)<1) ;
}
void esp_gdbstub_flush()
{
usb_serial_jtag_ll_txfifo_flush();
}
#else
//assume UART gdbstub channel
int esp_gdbstub_getchar()
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
}
return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
}
void esp_gdbstub_putchar(int c)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
;
}
REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
}
void esp_gdbstub_flush()
{
//not needed for uart
}
#endif
int esp_gdbstub_readmem(intptr_t addr)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

7
components/esp_gdbstub/esp32h4/gdbstub_target_config.h
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@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

10
components/esp_gdbstub/esp32s2/gdbstub_target_config.h
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@ -1,10 +0,0 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* Number of extra TIE defined registers, not listed in the XCHAL */
#define GDBSTUB_EXTRA_TIE_SIZE 1

10
components/esp_gdbstub/esp32s3/gdbstub_target_config.h
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@ -1,10 +0,0 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* Number of extra TIE defined registers, not listed in the XCHAL */
#define GDBSTUB_EXTRA_TIE_SIZE 1

127
components/esp_gdbstub/esp_common/gdbstub_common.c
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@ -1,127 +0,0 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#include "hal/uart_ll.h"
#include "freertos/FreeRTOS.h"
#include "xtensa/config/specreg.h"
#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
static uart_dev_t *gdb_uart = NULL;
void esp_gdbstub_target_init(void)
{
switch (UART_NUM) {
case 0:
gdb_uart = &UART0;
break;
#if SOC_UART_NUM > 1
case 1:
gdb_uart = &UART1;
break;
#endif
#if SOC_UART_NUM > 2
case 2:
gdb_uart = &UART2;
break;
#endif
default:
gdb_uart = &UART0;
break;
}
}
int esp_gdbstub_getchar(void)
{
if (gdb_uart == NULL) {
esp_gdbstub_target_init();
}
unsigned char data;
while (uart_ll_get_rxfifo_len(gdb_uart) == 0) {
}
uart_ll_read_rxfifo(gdb_uart, &data, 1);
return data;
}
void esp_gdbstub_putchar(int c)
{
if (gdb_uart == NULL) {
esp_gdbstub_target_init();
}
while (uart_ll_get_txfifo_len(gdb_uart) <= 126) {
}
uart_ll_write_txfifo(gdb_uart, (uint8_t *)&c, 1);
}
void esp_gdbstub_flush()
{
// wait until some data in transmition
while (false == uart_ll_is_tx_idle(gdb_uart))
{
}
}
int esp_gdbstub_getfifo()
{
if (gdb_uart == NULL) {
esp_gdbstub_target_init();
}
int doDebug = 0;
int fifolen = uart_ll_get_rxfifo_len(gdb_uart);
while (fifolen != 0) {
unsigned char data;
uart_ll_read_rxfifo(gdb_uart, &data, 1);
if (data == 0x3) {
doDebug = 1; //Check if any of the chars is Ctrl+C. Throw away rest.
}
fifolen--;
}
uart_ll_clr_intsts_mask(gdb_uart, UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT);
return doDebug;
}
int esp_gdbstub_readmem(intptr_t addr)
{
if (addr < 0x20000000 || addr >= 0x80000000) {
/* see cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (addr < 0x20000000 || addr >= 0x80000000) {
/* see cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
asm volatile("ISYNC\nISYNC\n");
return 0;
}

26
components/esp_gdbstub/private_include/esp_gdbstub_common.h
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@ -10,7 +10,6 @@
#include <stddef.h>
#include <stdbool.h>
#include "gdbstub_target_config.h"
#include "esp_gdbstub_arch.h"
#include "sdkconfig.h"
@ -29,7 +28,6 @@
/* Special task index values */
#define GDBSTUB_CUR_TASK_INDEX_UNKNOWN -1
/* Cab be set to a lower value in gdbstub_target_config.h */
#ifndef GDBSTUB_CMD_BUFLEN
#define GDBSTUB_CMD_BUFLEN 512
#endif
@ -86,14 +84,7 @@ void esp_gdbstub_tcb_to_regfile(TaskHandle_t tcb, esp_gdbstub_gdb_regfile_t *dst
#endif // CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
/**** Functions provided by the target specific part ****/
/**
* Do target-specific initialization before gdbstub can start communicating.
* This may involve, for example, configuring the UART.
*/
void esp_gdbstub_target_init(void);
/**** UART related functions ****/
/**
* Receive a byte from the GDB client. Blocks until a byte is available.
@ -107,27 +98,12 @@ int esp_gdbstub_getchar(void);
*/
void esp_gdbstub_putchar(int c);
/**
* Read a byte from target memory
* @param ptr address
* @return byte value, or GDBSTUB_ST_ERR if the address is not readable
*/
int esp_gdbstub_readmem(intptr_t addr);
/**
* Make sure all bytes sent using putchar() end up at the host.
* (Usually stubbed for UART, but can be useful for other channels)
*/
void esp_gdbstub_flush(void);
/**
* Write a byte to target memory
* @param addr address
* @param data data byte
* @return 0 in case of success, -1 in case of error
*/
int esp_gdbstub_writemem(unsigned int addr, unsigned char data);
/**
* Read a data from fifo and detect start symbol
* @return 1 if break symbol was detected, or 0 if not

30
components/esp_gdbstub/private_include/esp_gdbstub_memory_regions_common.h Normal file
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@ -0,0 +1,30 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "sdkconfig.h"
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
#include "soc/reg_base.h"
#include "soc/usb_serial_jtag_struct.h"
#else
#include "soc/uart_reg.h"
#include "soc/uart_struct.h"
#endif
static inline bool is_transport_memory_region(intptr_t addr)
{
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
return addr >= DR_REG_USB_SERIAL_JTAG_BASE &&
addr <= DR_REG_USB_SERIAL_JTAG_BASE + sizeof(USB_SERIAL_JTAG);
#else
return addr >= REG_UART_BASE(CONFIG_ESP_CONSOLE_UART_NUM) &&
addr <= REG_UART_BASE(CONFIG_ESP_CONSOLE_UART_NUM) + sizeof(UART0);
#endif
}

32
components/esp_gdbstub/src/gdbstub.c
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@ -7,6 +7,7 @@
#include <string.h>
#include "esp_gdbstub.h"
#include "esp_gdbstub_common.h"
#include "esp_gdbstub_memory_regions.h"
#include "sdkconfig.h"
#include <sys/param.h>
@ -73,7 +74,6 @@ void esp_gdbstub_panic_handler(void *in_frame)
}
#endif /* CONFIG_ESP_GDBSTUB_SUPPORT_TASKS */
esp_gdbstub_target_init();
s_scratch.signal = esp_gdbstub_get_signal(frame);
send_reason();
while (true) {
@ -403,6 +403,36 @@ static void handle_G_command(const unsigned char *cmd, int len)
esp_gdbstub_send_str_packet("OK");
}
static int esp_gdbstub_readmem(intptr_t addr)
{
if (!is_valid_memory_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
uint32_t val_aligned = *(uint32_t *)(addr & (~3));
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
static int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!is_valid_memory_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
unsigned *addr_aligned = (unsigned *)(addr & (~3));
const uint32_t bit_offset = (addr & 0x3) * 8;
const uint32_t mask = ~(0xff << bit_offset);
*addr_aligned = (*addr_aligned & mask) | (data << bit_offset);
#if CONFIG_IDF_TARGET_ARCH_XTENSA
asm volatile("ISYNC\nISYNC\n");
#endif // CONFIG_IDF_TARGET_ARCH_XTENSA
return 0;
}
/** Read memory to gdb */
static void handle_m_command(const unsigned char *cmd, int len)
{

119
components/esp_gdbstub/src/gdbstub_transport.c Normal file
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@ -0,0 +1,119 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp_gdbstub.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
#include "hal/usb_serial_jtag_ll.h"
#else
#include "hal/uart_ll.h"
#endif
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
int esp_gdbstub_getchar()
{
uint8_t c;
// retry the read until we succeed
while (usb_serial_jtag_ll_read_rxfifo(&c, 1) == 0) {
;
}
return c;
}
void esp_gdbstub_putchar(int c)
{
uint8_t cc = c;
// retry the write until we succeed
while (usb_serial_jtag_ll_write_txfifo(&cc, 1) < 1) {
;
}
}
void esp_gdbstub_flush(void)
{
usb_serial_jtag_ll_txfifo_flush();
}
#else // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
static uart_dev_t *gdb_uart = NULL;
static inline void esp_gdbstub_uart_init(void)
{
if (gdb_uart != NULL) {
return;
}
switch (CONFIG_ESP_CONSOLE_UART_NUM) {
case 0:
gdb_uart = &UART0;
break;
#if CONFIG_SOC_UART_NUM > 1
case 1:
gdb_uart = &UART1;
break;
#endif
#if CONFIG_SOC_UART_NUM > 2
case 2:
gdb_uart = &UART2;
break;
#endif
default:
gdb_uart = &UART0;
break;
}
}
int esp_gdbstub_getchar(void)
{
esp_gdbstub_uart_init();
unsigned char data;
while (uart_ll_get_rxfifo_len(gdb_uart) == 0) {
;
}
uart_ll_read_rxfifo(gdb_uart, &data, 1);
return data;
}
void esp_gdbstub_putchar(int c)
{
esp_gdbstub_uart_init();
while (uart_ll_get_txfifo_len(gdb_uart) <= 126) {
;
}
uart_ll_write_txfifo(gdb_uart, (uint8_t *)&c, 1);
}
void esp_gdbstub_flush(void)
{
esp_gdbstub_uart_init();
// wait until some data in transmition
while (false == uart_ll_is_tx_idle(gdb_uart)) {
;
}
}
int esp_gdbstub_getfifo(void)
{
esp_gdbstub_uart_init();
int doDebug = 0;
int fifolen = uart_ll_get_rxfifo_len(gdb_uart);
while (fifolen != 0) {
unsigned char data;
uart_ll_read_rxfifo(gdb_uart, &data, 1);
if (data == 0x3) {
doDebug = 1; // Check if any of the chars is Ctrl+C. Throw away rest.
}
fifolen--;
}
uart_ll_clr_intsts_mask(gdb_uart, UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT);
return doDebug;
}
#endif // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG

4
components/esp_gdbstub/riscv/gdbstub_riscv.c → components/esp_gdbstub/src/port/riscv/gdbstub_riscv.c
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@ -8,10 +8,8 @@
#include "esp_gdbstub.h"
#include "esp_gdbstub_common.h"
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
static inline void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
{
memset(dst, 0, sizeof(*dst));
}

1
components/esp_gdbstub/riscv/esp_gdbstub_arch.h → components/esp_gdbstub/src/port/riscv/include/esp_gdbstub_arch.h
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@ -7,7 +7,6 @@
#pragma once
#include <stdint.h>
#include "riscv/rvruntime-frames.h"
#include "gdbstub_target_config.h"
#ifdef __cplusplus
extern "C" {

41
components/esp_gdbstub/src/port/riscv/include/esp_gdbstub_memory_regions.h Normal file
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@ -0,0 +1,41 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_gdbstub_memory_regions_common.h"
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {
#endif
static inline bool __is_valid_memory_region(intptr_t addr)
{
return (addr >= SOC_DROM_LOW && addr < SOC_DROM_HIGH) ||
(addr >= SOC_IROM_LOW && addr < SOC_IROM_HIGH) ||
(addr >= SOC_IRAM_LOW && addr < SOC_IRAM_HIGH) ||
(addr >= SOC_DRAM_LOW && addr < SOC_DRAM_HIGH) ||
(addr >= SOC_IROM_MASK_LOW && addr < SOC_IROM_MASK_HIGH) ||
(addr >= SOC_DROM_MASK_LOW && addr < SOC_DROM_MASK_HIGH) ||
#if defined(SOC_RTC_IRAM_LOW) && defined(SOC_RTC_IRAM_HIGH)
(addr >= SOC_RTC_IRAM_LOW && addr < SOC_RTC_IRAM_HIGH) ||
/* RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them */
#endif
(addr >= SOC_PERIPHERAL_LOW && addr < SOC_PERIPHERAL_HIGH) ||
(addr >= SOC_DEBUG_LOW && addr < SOC_DEBUG_HIGH);
}
static inline bool is_valid_memory_region(intptr_t addr)
{
/* We shouldn't read transport registers since it will disturb the debugging. */
return (!is_transport_memory_region(addr)) && __is_valid_memory_region(addr);
}
#ifdef __cplusplus
}
#endif

0
components/esp_gdbstub/xtensa/gdbstub-entry.S → components/esp_gdbstub/src/port/xtensa/gdbstub-entry.S
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2
components/esp_gdbstub/xtensa/gdbstub_xtensa.c → components/esp_gdbstub/src/port/xtensa/gdbstub_xtensa.c
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@ -19,7 +19,7 @@
extern int _invalid_pc_placeholder;
static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
static inline void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
{
memset(dst, 0, sizeof(*dst));
}

10
components/esp_gdbstub/xtensa/esp_gdbstub_arch.h → components/esp_gdbstub/src/port/xtensa/include/esp_gdbstub_arch.h
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@ -7,7 +7,15 @@
#pragma once
#include <stdint.h>
#include "freertos/xtensa_context.h"
#include "gdbstub_target_config.h"
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32
#define GDBSTUB_EXTRA_TIE_SIZE 0
#elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
#define GDBSTUB_EXTRA_TIE_SIZE 1
#else
#error "Unknown Xtensa chip"
#endif
#ifdef __cplusplus
extern "C" {

25
components/esp_gdbstub/src/port/xtensa/include/esp_gdbstub_memory_regions.h Normal file
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@ -0,0 +1,25 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_gdbstub_memory_regions_common.h"
#ifdef __cplusplus
extern "C" {
#endif
static inline bool is_valid_memory_region(intptr_t addr)
{
/* We shouldn't read transport registers since it will disturb the debugging. */
return (!is_transport_memory_region(addr)) &&
addr >= 0x20000000 && addr < 0x80000000;
}
#ifdef __cplusplus
}
#endif

0
components/esp_gdbstub/xtensa/xt_debugexception.S → components/esp_gdbstub/src/port/xtensa/xt_debugexception.S
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