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esp_flash: fix a compatibility issue working with the ROM

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The esp_flash API has a side effects: it modifies the clock control
registers, and this makes the clock inconsistent with the ROM variable
`g_rom_spiflash_dummy_len_plus`.

This commit helps the ROM to get the correct dummy cycles required by
the latest clock settings. Every device on the SPI1 bus will update the
ROM variable when it modifies the clock registers.
This commit is contained in:
Michael (XIAO Xufeng) 2019-07-07 18:11:02 +08:00 committed by bot
parent bfb0f83b32
commit fa555e3109
1 changed files with 11 additions and 0 deletions
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11
components/soc/src/hal/spi_flash_hal_iram.c
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@ -38,6 +38,17 @@ esp_err_t spi_flash_hal_device_config(spi_flash_host_driver_t *driver)
spi_flash_ll_reset(dev); spi_flash_ll_reset(dev);
spi_flash_ll_set_cs_pin(dev, drv_data->cs_num); spi_flash_ll_set_cs_pin(dev, drv_data->cs_num);
spi_flash_ll_set_clock(dev, &drv_data->clock_conf); spi_flash_ll_set_clock(dev, &drv_data->clock_conf);
/*
* workaround for the ROM: the ROM, as well as the OpenOCD, don't know the
* clock registers and the dummy are modified this help the ROM to read and
* write correctly according to the new dummy len.
*/
if (dev == &SPI1) {
//0 for cache, 1 for SPI1
extern uint8_t g_rom_spiflash_dummy_len_plus[];
g_rom_spiflash_dummy_len_plus[1] = drv_data->extra_dummy;
}
return ESP_OK; return ESP_OK;
} }