diff --git a/components/hal/esp32c5/include/hal/etm_ll.h b/components/hal/esp32c5/include/hal/etm_ll.h
index 6708cd7f17..a042b0f922 100644
--- a/components/hal/esp32c5/include/hal/etm_ll.h
+++ b/components/hal/esp32c5/include/hal/etm_ll.h
@@ -11,6 +11,7 @@
 #include <stdbool.h>
 #include "hal/assert.h"
 #include "hal/misc.h"
+#include "hal/lp_aon_ll.h"
 #include "soc/soc_etm_struct.h"
 #include "soc/pcr_struct.h"
 
@@ -112,6 +113,10 @@ static inline void etm_ll_channel_set_task(soc_etm_dev_t *hw, uint32_t chan, uin
     HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[chan].tid, chn_task_id, task);
 }
 
+#define etm_ll_is_lpcore_wakeup_triggered()       lp_aon_ll_get_lpcore_etm_wakeup_flag()
+
+#define etm_ll_clear_lpcore_wakeup_status()       lp_aon_ll_clear_lpcore_etm_wakeup_flag()
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/soc/esp32c5/include/soc/soc_etm_source.h b/components/soc/esp32c5/include/soc/soc_etm_source.h
index c1b6f4f49d..32470c56fb 100644
--- a/components/soc/esp32c5/include/soc/soc_etm_source.h
+++ b/components/soc/esp32c5/include/soc/soc_etm_source.h
@@ -292,8 +292,8 @@
 #define I2S0_TASK_START_TX                      140
 #define I2S0_TASK_STOP_RX                       141
 #define I2S0_TASK_STOP_TX                       142
-#define ULP_TASK_WAKEUP_CPU                     143
-#define ULP_TASK_INT_CPU                        144
+#define ULP_TASK_WAKEUP_CPU                     137
+#define ULP_TASK_INT_CPU                        138
 #define RTC_TASK_START                          145
 #define RTC_TASK_STOP                           146
 #define RTC_TASK_CLR                            147
diff --git a/components/ulp/test_apps/.build-test-rules.yml b/components/ulp/test_apps/.build-test-rules.yml
index b601d66f14..0f1c3e5be9 100644
--- a/components/ulp/test_apps/.build-test-rules.yml
+++ b/components/ulp/test_apps/.build-test-rules.yml
@@ -3,17 +3,11 @@
 components/ulp/test_apps/lp_core:
   disable:
     - if: SOC_LP_CORE_SUPPORTED != 1
-  depends_components:
-    - ulp
 
 components/ulp/test_apps/ulp_fsm:
   enable:
     - if: SOC_ULP_FSM_SUPPORTED == 1
-  depends_components:
-    - ulp
 
 components/ulp/test_apps/ulp_riscv:
   disable:
     - if: SOC_RISCV_COPROC_SUPPORTED != 1
-  depends_components:
-    - ulp