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spi_flash: Add option to log warnings if (spuriously) writing zero bits to ones
Won't work for SPIFFS, maybe some other implementations?
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@ -17,6 +17,20 @@ config SPI_FLASH_LOG_FAILED_WRITE
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will be written with the address, expected & actual values. This can be useful when
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will be written with the address, expected & actual values. This can be useful when
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debugging hardware SPI flash problems.
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debugging hardware SPI flash problems.
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config SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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bool "Log warning if writing zero bits to ones"
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depends on SPI_FLASH_VERIFY_WRITE
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default n
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help
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If this option is enabled, any SPI flash write which tries to set zero bits in the flash to
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ones will log a warning. Such writes will not result in the requested data appearing identically
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in flash once written, as SPI NOR flash can only set bits to one when an entire sector is erased.
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After erasing, individual bits can only be written from one to zero.
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Note that some software (such as SPIFFS) which is aware of SPI NOR flash may write one bits as an
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optimisation, relying on the data in flash becoming a bitwise AND of the new data and any existing data.
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Such software will log spurious warnings if this option is enabled.
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config SPI_FLASH_ENABLE_COUNTERS
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config SPI_FLASH_ENABLE_COUNTERS
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bool "Enable operation counters"
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bool "Enable operation counters"
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default 0
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default 0
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@ -260,6 +260,21 @@ static IRAM_ATTR esp_rom_spiflash_result_t spi_flash_write_inner(uint32_t target
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break;
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break;
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}
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}
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#ifdef CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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for (int r = 0; r < read_len; r += sizeof(uint32_t)) {
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int r_w = r / sizeof(uint32_t); // index in words (r is index in bytes)
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uint32_t write = src_addr[i_w + r_w];
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uint32_t before = before_buf[r_w];
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if ((before & write) != write) {
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spi_flash_guard_end();
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ESP_LOGW(TAG, "Write at offset 0x%x requests 0x%08x but will write 0x%08x -> 0x%08x",
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target + i + r, write, before, before & write);
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spi_flash_guard_start();
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}
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}
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#endif
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res = esp_rom_spiflash_write(target + i, &src_addr[i_w], read_len);
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res = esp_rom_spiflash_write(target + i, &src_addr[i_w], read_len);
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if (res != ESP_ROM_SPIFLASH_RESULT_OK) {
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if (res != ESP_ROM_SPIFLASH_RESULT_OK) {
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break;
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break;
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