From f6eba4ccfef2185d711100ea18877cde705e9183 Mon Sep 17 00:00:00 2001
From: morris <maoshengrong@espressif.com>
Date: Sat, 17 Sep 2022 16:13:28 +0800
Subject: [PATCH] gpio_sdm: bring up SDM driver on esp32c6

---
 components/hal/esp32c6/include/hal/sdm_ll.h   | 58 +++++++++++++++++++
 .../esp32c6/include/soc/Kconfig.soc_caps.in   |  4 ++
 components/soc/esp32c6/include/soc/soc_caps.h |  3 +-
 3 files changed, 63 insertions(+), 2 deletions(-)
 create mode 100644 components/hal/esp32c6/include/hal/sdm_ll.h

diff --git a/components/hal/esp32c6/include/hal/sdm_ll.h b/components/hal/esp32c6/include/hal/sdm_ll.h
new file mode 100644
index 0000000000..fbf387e258
--- /dev/null
+++ b/components/hal/esp32c6/include/hal/sdm_ll.h
@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_ext_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.function_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
index d40af008cb..3b2894c0ed 100644
--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -55,6 +55,10 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
+config SOC_SDM_SUPPORTED
+    bool
+    default y
+
 config SOC_SYSTIMER_SUPPORTED
     bool
     default y
diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h
index e7da19ada6..5ef41b3666 100644
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -42,7 +42,7 @@
 #define SOC_RTC_MEM_SUPPORTED           1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-// #define SOC_SDM_SUPPORTED               1 // TODO: IDF-5318
+#define SOC_SDM_SUPPORTED               1
 // #define SOC_LEDC_SUPPORTED              1 // TODO: IDF-5328
 // #define SOC_I2C_SUPPORTED               1 // TODO: IDF-5326
 #define SOC_SYSTIMER_SUPPORTED          1
@@ -268,7 +268,6 @@
 #define SOC_SHA_SUPPORT_SHA224          (1)
 #define SOC_SHA_SUPPORT_SHA256          (1)
 
-// TODO: IDF-5318 (Copy from esp32c3, need check)
 /*-------------------------- Sigma Delta Modulator CAPS -----------------*/
 #define SOC_SDM_GROUPS             1U
 #define SOC_SDM_CHANNELS_PER_GROUP 4