bugfix: add .rodata section for riscv ulp for esp32s2

2024-10-05 20:47:46 -04:00 · 2021-04-12 14:29:13 +08:00 · 2021-04-12 14:29:13 +08:00 · f6d96f33bb
commit f6d96f33bb
parent 228f875ada
1 changed files with 6 additions and 0 deletions
--- a/components/ulp/ld/esp32s2.ulp.riscv.ld
+++ b/components/ulp/ld/esp32s2.ulp.riscv.ld
@ -17,6 +17,12 @@ SECTIONS
        *(.text*)
    } >ram

+    .rodata ALIGN(4):
+    {
+        *(.rodata)
+        *(.rodata*)
+    } > ram
+
    .data ALIGN(4):
    {
        *(.data)