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Merge 44264e4466 into 9b3eda0974

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Alfonso Acosta 2024-09-20 14:40:34 +08:00 committed by GitHub
commit f6372e1b43
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2 changed files with 37 additions and 10 deletions
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39
components/esp_hw_support/port/esp32s3/include/soc/rtc.h
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@ -7,9 +7,7 @@
#pragma once #pragma once
#include <stdbool.h> #include <stdbool.h>
#include <stddef.h>
#include <stdint.h> #include <stdint.h>
#include "soc/soc.h"
#include "soc/clk_tree_defs.h" #include "soc/clk_tree_defs.h"
#ifdef __cplusplus #ifdef __cplusplus
@ -94,23 +92,44 @@ extern "C" {
#define DIG_DBIAS_XTAL RTC_CNTL_DBIAS_1V10 #define DIG_DBIAS_XTAL RTC_CNTL_DBIAS_1V10
#define DIG_DBIAS_2M RTC_CNTL_DBIAS_1V00 #define DIG_DBIAS_2M RTC_CNTL_DBIAS_1V00
#define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20
#define RTC_CNTL_XTL_BUF_WAIT_DEFAULT 100 #if defined(CONFIG_RTC_CLK_SRC_EXT_OSC) || defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
#define RTC_CNTL_CK8M_WAIT_DEFAULT 20 // Equivalent macro as `CLK_LL_RC_FAST_WAIT_DEFAULT` #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 5
#define RTC_CK8M_ENABLE_WAIT_DEFAULT 5 // Equivalent macro as `CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT` #define RTC_CNTL_XTL_BUF_WAIT_DEFAULT 25
#define RTC_CNTL_CK8M_WAIT_DEFAULT 5 // Equivalent macro as `CLK_LL_RC_FAST_WAIT_DEFAULT`
#define RTC_CK8M_ENABLE_WAIT_DEFAULT 2 // Equivalent macro as `CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT`
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP (0x40)
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT (0x04)
#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES (1)
#define RTC_CNTL_WAKEUP_DELAY_CYCLES (1)
#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
#define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 10
#define RTC_CNTL_XTL_BUF_WAIT_DEFAULT 50
#define RTC_CNTL_CK8M_WAIT_DEFAULT 10 // Equivalent macro as `CLK_LL_RC_FAST_WAIT_DEFAULT`
#define RTC_CK8M_ENABLE_WAIT_DEFAULT 3 // Equivalent macro as `CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT`
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP (0x80)
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT (0x08)
#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES (2)
#define RTC_CNTL_WAKEUP_DELAY_CYCLES (2)
#else // Internal 150k oscillator
#define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20
#define RTC_CNTL_XTL_BUF_WAIT_DEFAULT 100
#define RTC_CNTL_CK8M_WAIT_DEFAULT 20 // Equivalent macro as `CLK_LL_RC_FAST_WAIT_DEFAULT`
#define RTC_CK8M_ENABLE_WAIT_DEFAULT 5 // Equivalent macro as `CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT`
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP (0xFF)
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT (0x10)
#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES (4)
#define RTC_CNTL_WAKEUP_DELAY_CYCLES (4)
#endif
/* Various delays to be programmed into power control state machines */ /* Various delays to be programmed into power control state machines */
#define RTC_CNTL_XTL_BUF_WAIT_SLP_US (250) #define RTC_CNTL_XTL_BUF_WAIT_SLP_US (250)
#define RTC_CNTL_PLL_BUF_WAIT_SLP_CYCLES (1) #define RTC_CNTL_PLL_BUF_WAIT_SLP_CYCLES (1)
#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES (4)
#define RTC_CNTL_WAKEUP_DELAY_CYCLES (4)
#define RTC_CNTL_MIN_SLP_VAL_MIN (2) #define RTC_CNTL_MIN_SLP_VAL_MIN (2)
#define RTC_CNTL_CK8M_DFREQ_DEFAULT 100 #define RTC_CNTL_CK8M_DFREQ_DEFAULT 100
#define RTC_CNTL_SCK_DCAP_DEFAULT 255 #define RTC_CNTL_SCK_DCAP_DEFAULT 255
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP (0xFF)
#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT (0x10)
/* /*
set sleep_init default param set sleep_init default param

8
components/hal/esp32s3/include/hal/clk_tree_ll.h
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@ -34,8 +34,16 @@ extern "C" {
#define CLK_LL_AHB_MAX_FREQ_MHZ CLK_LL_PLL_80M_FREQ_MHZ #define CLK_LL_AHB_MAX_FREQ_MHZ CLK_LL_PLL_80M_FREQ_MHZ
/* RC_FAST clock enable/disable wait time */ /* RC_FAST clock enable/disable wait time */
#if defined(CONFIG_RTC_CLK_SRC_EXT_OSC) || defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
#define CLK_LL_RC_FAST_WAIT_DEFAULT 5
#define CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT 2
#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
#define CLK_LL_RC_FAST_WAIT_DEFAULT 10
#define CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT 3
#else
#define CLK_LL_RC_FAST_WAIT_DEFAULT 20 #define CLK_LL_RC_FAST_WAIT_DEFAULT 20
#define CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT 5 #define CLK_LL_RC_FAST_ENABLE_WAIT_DEFAULT 5
#endif
#define CLK_LL_XTAL32K_CONFIG_DEFAULT() { \ #define CLK_LL_XTAL32K_CONFIG_DEFAULT() { \
.dac = 3, \ .dac = 3, \