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Correct ULP REG_WR and REG_RD instruction for ESP32

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This commit is contained in:
Krzysztof Budzynski 2020-03-06 19:08:29 +08:00
parent 408d1d9f93
commit f5b678f7ba
1 changed files with 24 additions and 31 deletions
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29
docs/en/api-guides/ulp_instruction_set.rst
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@ -851,9 +851,9 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
**REG_RD** *Addr, High, Low* **REG_RD** *Addr, High, Low*
**Operands** **Operands**
- *Addr* – register address, in 32-bit words - *Addr* – Register address, in 32-bit words
- *High* – High part of R0 - *High* – Register end bit number
- *Low* – Low part of R0 - *Low* – Register start bit number
**Cycles** **Cycles**
4 cycles to execute, 4 cycles to fetch next instruction 4 cycles to execute, 4 cycles to fetch next instruction
@ -861,14 +861,13 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
**Description** **Description**
The instruction reads up to 16 bits from a peripheral register into a general purpose register: ``R0 = REG[Addr][High:Low]``. The instruction reads up to 16 bits from a peripheral register into a general purpose register: ``R0 = REG[Addr][High:Low]``.
This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, can be calculated from the address of the same register on the DPORT bus as follows::
can be calculated from the address of the same register on the DPORT bus as follows::
addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4 addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4
**Examples**:: **Examples**::
1: REG_RD 0x120, 2, 0 // load 4 bits: R0 = {12'b0, REG[0x120][7:4]} 1: REG_RD 0x120, 7, 4 // load 4 bits: R0 = {12'b0, REG[0x120][7:4]}
**REG_WR** – write to peripheral register **REG_WR** – write to peripheral register
@ -878,19 +877,18 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
**REG_WR** *Addr, High, Low, Data* **REG_WR** *Addr, High, Low, Data*
**Operands** **Operands**
- *Addr* – register address, in 32-bit words. - *Addr* – Register address, in 32-bit words.
- *High* – High part of R0 - *High* – Register end bit number
- *Low* – Low part of R0 - *Low* – Register start bit number
- *Data* – value to write, 8 bits - *Data* – Value to write, 8 bits
**Cycles** **Cycles**
8 cycles to execute, 4 cycles to fetch next instruction 8 cycles to execute, 4 cycles to fetch next instruction
**Description** **Description**
The instruction writes up to 8 bits from a general purpose register into a peripheral register. ``REG[Addr][High:Low] = data`` The instruction writes up to 8 bits from an immediate data value into a peripheral register: ``REG[Addr][High:Low] = data``.
This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, can be calculated from the address of the same register on the DPORT bus as follows::
can be calculated from the address of the same register on the DPORT bus as follows::
addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4 addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4
@ -943,8 +941,3 @@ WRITE_RTC_FIELD(rtc_reg, field, value)
/* Set RTC_CNTL_ULP_CP_SLP_TIMER_EN field of RTC_CNTL_STATE0_REG to 0 */ /* Set RTC_CNTL_ULP_CP_SLP_TIMER_EN field of RTC_CNTL_STATE0_REG to 0 */
WRITE_RTC_FIELD(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0) WRITE_RTC_FIELD(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0)